| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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| 02/13/1997 | CA2227890A1 Universal sender device |
| 02/11/1997 | US5602498 Current switching logic type circuit with small current consumption |
| 02/11/1997 | US5602497 Precharged adiabatic pipelined logic |
| 02/11/1997 | US5602495 Apparatus for providing an output voltage with substantially identical rising and falling characteristics |
| 02/11/1997 | US5602494 Bi-directional programmable I/O cell |
| 02/06/1997 | WO1997004528A1 Low noise tri-state output buffer |
| 02/06/1997 | WO1997004527A1 Circuit board insertion circuitry for high reliability backplanes |
| 02/06/1997 | CA2227376A1 Circuit board insertion circuitry for high reliability backplanes |
| 02/05/1997 | EP0756783A1 Impedance emulator |
| 02/04/1997 | US5600599 Data signal output circuit and semiconductor memory device including the same |
| 02/04/1997 | US5600597 Register protection structure for FPGA |
| 02/04/1997 | US5600273 Constant delay logic circuits and methods |
| 02/04/1997 | US5600271 Input signal interface with independently controllable pull-up and pull-down circuitry |
| 02/04/1997 | US5600268 Gate circuit of combined field-effect and bipolar transistors |
| 02/04/1997 | US5600267 Apparatus for a programmable CML to CMOS translator for power/speed adjustment |
| 02/04/1997 | US5600266 Digital logic output buffer interface for different semiconductor technologies |
| 02/04/1997 | US5600265 Programmable interconnect architecture |
| 02/04/1997 | US5600264 Programmable single buffered six pass transistor configuration |
| 02/04/1997 | US5600263 Configuration modes for a time multiplexed programmable logic device |
| 02/04/1997 | US5600261 Output enable access for an output buffer |
| 02/04/1997 | US5600260 Method and apparatus for hardening current steering logic to soft errors |
| 01/30/1997 | WO1997003498A1 Output circuit and electronic device using the circuit |
| 01/30/1997 | WO1997003444A1 System comprising field programmable gate array and intelligent memory |
| 01/30/1997 | DE19601386A1 Ausgangspufferschaltkreis Output buffer circuit |
| 01/29/1997 | EP0756383A2 Field programmable gate array with multi-port RAM |
| 01/29/1997 | EP0756382A2 Logic module with configurable combinational and sequential blocks |
| 01/29/1997 | EP0756222A2 Clamp circuit for remotely sensed voltage |
| 01/29/1997 | EP0755588A1 Architecture and interconnect scheme for programmable logic circuits |
| 01/29/1997 | CN1141702A Termination network and control circuit |
| 01/28/1997 | US5598347 Layout method for designing an integrated circuit device by using standard cells |
| 01/28/1997 | US5598346 Array of configurable logic blocks including network means for broadcasting clock signals to different pluralities of logic blocks |
| 01/28/1997 | US5598122 Voltage reference circuit having a threshold voltage shift |
| 01/28/1997 | US5598119 Method and apparatus for a load adaptive pad driver |
| 01/28/1997 | US5598110 Detector circuit for use with tri-state logic devices |
| 01/28/1997 | US5598109 Programmable logic array device with grouped logic regions and three types of conductors |
| 01/28/1997 | US5598108 High-density erasable programmable logic device architecture using multiplexer interconnections, and registered macrocell with product term allocation and adjacent product term stealing |
| 01/28/1997 | US5598107 Current switching circuit having reduced current noise operation |
| 01/28/1997 | US5598106 Semiconductor integrated circuit for preventing deterioration of the characteristics of an N-channel type transistor |
| 01/28/1997 | US5598105 Elementary cell for constructing asynchronous superconducting logic circuits |
| 01/23/1997 | WO1997002661A1 Arrangement and method relating to digital information |
| 01/23/1997 | WO1997002658A1 Mos termination for low power signaling |
| 01/23/1997 | WO1997002493A2 A method for testing an electronic circuit by logically combining clock signals, and an electronic circuit provided with facilities for such testing |
| 01/23/1997 | DE19537888C1 Decoder gate for addressing semiconductor memory or control logic circuit |
| 01/22/1997 | EP0755119A1 Device for analog-digital conversion |
| 01/22/1997 | EP0755017A2 Method for simultaneous programming of in-system programmable integrated circuits |
| 01/21/1997 | US5596766 Configurable logic networks |
| 01/21/1997 | US5596743 Field programmable logic device with dynamic interconnections to a dynamic logic core |
| 01/21/1997 | US5596297 Output driver circuitry with limited output high voltage |
| 01/21/1997 | US5596295 In-phase signal output circuit, opposite-phase signal output circuit, and two-phase signal output circuit |
| 01/21/1997 | US5596291 Circuits, systems and methods for the high speed transfer of data across a conductive line |
| 01/21/1997 | US5596287 Programmable logic module for data path applications |
| 01/21/1997 | US5596286 Current limiting devices to reduce leakage, photo, or stand-by current in an integrated circuit |
| 01/21/1997 | US5596285 Impedance adaptation process and device for a transmitter and/or receiver, integrated circuit and transmission system |
| 01/21/1997 | US5596284 System for, and method of, minimizing noise in an integrated circuit chip |
| 01/21/1997 | CA2073105C High speed bus transceiver with fault tolerant design for hot pluggable applications |
| 01/16/1997 | WO1997001886A1 A fast swing-limited pullup circuit |
| 01/16/1997 | WO1997001811A2 Pipelined data processing circuit |
| 01/15/1997 | EP0753940A1 Method and device for softdriving an array of logic gates |
| 01/15/1997 | EP0753217A1 Signal-receiving and signal-processing unit |
| 01/15/1997 | EP0700598A4 Negative voltage generator for flash eprom design |
| 01/14/1997 | US5594698 Integrated circuit |
| 01/14/1997 | US5594633 Voltage-to-current converting circuit operating with low supply voltage |
| 01/14/1997 | US5594611 Integrated circuit input/output ESD protection circuit with gate voltage regulation and parasitic zener and junction diode |
| 01/14/1997 | US5594380 Bootstrap circuit and data output buffer having the bootstrap circuit |
| 01/14/1997 | US5594374 Data output buffer |
| 01/14/1997 | US5594373 Output driver circuitry with selective limited output high voltage |
| 01/14/1997 | US5594370 High performance backplane driver circuit |
| 01/14/1997 | US5594369 Open-drain fet output circuit |
| 01/14/1997 | US5594368 Low power combinational logic circuit |
| 01/14/1997 | US5594367 Output multiplexer within input/output circuit for time multiplexing and high speed logic |
| 01/14/1997 | US5594366 Programmable logic device with regional and universal signal routing |
| 01/14/1997 | US5594365 Flexible block clock generation circuit for providing clock signals to clocked elements in a multiple array high density programmable logic device |
| 01/14/1997 | US5594364 Programmable application specific integrated circuit and logic cell therefor |
| 01/14/1997 | US5594363 Logic cell and routing architecture in a field programmable gate array |
| 01/14/1997 | US5594362 For an integrated circuit device pin |
| 01/08/1997 | EP0752677A2 Parametric tuning of an integrated circuit after fabrication |
| 01/08/1997 | EP0752175A1 Low loss integrated circuit with reduced clock swing |
| 01/08/1997 | CN1139997A Breakdown protection circuit using high voltage detection |
| 01/08/1997 | CN1139841A High-quality dynamic comparison circuit and reading amplifier circuit |
| 01/08/1997 | CN1139811A Semiconductor storage device with improved stage power source line structure |
| 01/08/1997 | CN1139777A Processor and operational method and data processor |
| 01/07/1997 | US5592494 Semiconductor integrated circuit |
| 01/07/1997 | US5592419 Flash memory with improved erasability and its circuitry |
| 01/07/1997 | US5592416 Electronic storage circuit |
| 01/07/1997 | US5592116 Adjustable delay circuit |
| 01/07/1997 | US5592114 True type single-phase shift circuit |
| 01/07/1997 | US5592108 Interface circuit adapted for connection to following circuit using metal-semiconductor type transistor |
| 01/07/1997 | US5592107 Configurable NAND/NOR element |
| 01/07/1997 | US5592106 Programmable logic array integrated circuits with interconnection conductors of overlapping extent |
| 01/07/1997 | US5592105 Configuration logic to eliminate signal contention during reconfiguration |
| 01/07/1997 | US5592104 Output buffer having transmission gate and isolated supply terminals |
| 01/07/1997 | US5592102 Means and apparatus to minimize the effects of silicon processing defects in programmable logic devices |
| 01/07/1997 | US5591995 Base cell for BiCMOS and CMOS gate arrays |
| 01/02/1997 | EP0751621A1 Bootstrap line power supply regulator with no filter capacitor |
| 01/02/1997 | EP0751620A1 Arrangement of buffers and transmission lines to supply clock signals to logic gates |
| 01/02/1997 | DE19625661A1 Circuit element value, e.g. resistance, adjusting control apparatus for integrated circuit |
| 01/01/1997 | CN1139317A Logic circuit |
| 12/31/1996 | US5590361 Microprocessor having an effective BiCMOS extra multiple input complex logic circuit |
| 12/31/1996 | US5589790 Input structure for receiving high voltage signals on a low voltage integrated circuit device |
| 12/31/1996 | US5589789 Bus driver circuit for high-speed data transmission |