| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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| 02/13/1996 | US5491429 Apparatus for reducing current consumption in a CMOS inverter circuit |
| 02/13/1996 | US5491428 Bus-isolating pre-charge buffer |
| 02/13/1996 | US5491353 Configurable cellular array |
| 02/08/1996 | WO1996003807A1 Digital circuit topology offering an improved power delay product |
| 02/07/1996 | EP0696064A2 Monolithically integrated VLSI optoelectronic circuits and a method of fabricating the same |
| 02/07/1996 | EP0695477A1 Sequentially clocked domino-logic cells |
| 02/07/1996 | EP0695442A1 Strongly fail-safe interface based on concurrent checking |
| 02/06/1996 | US5490171 Single-port network node transceiver with powered-down protection |
| 02/06/1996 | US5490074 Constant delay interconnect for coupling configurable logic blocks |
| 02/06/1996 | US5489865 Circuit for filtering asynchronous metastability of cross-coupled logic gates |
| 02/06/1996 | US5489862 Output driver with slew and skew rate control |
| 02/06/1996 | US5489861 High power, edge controlled output buffer |
| 02/06/1996 | US5489859 CMOS output circuit with high speed high impedance mode |
| 02/06/1996 | US5489858 Soft wakeup output buffer |
| 02/06/1996 | US5489857 Flexible synchronous/asynchronous cell structure for a high density programmable logic device |
| 02/06/1996 | US5489856 Laser-programmable clocked-logic integrated-circuit |
| 02/01/1996 | DE4426838A1 Circuit arrangement for blocking output signals |
| 02/01/1996 | DE19526564A1 CMOS-Treiberschaltkreis zum Tief-Hoch-Spannungsansteuern kapazitiver Lasten CMOS driver circuit for low-high voltage trigger turn-on capacitive loads |
| 01/31/1996 | EP0695060A1 Backplane bus for differential signals |
| 01/31/1996 | EP0695037A1 Off-chip driver circuit |
| 01/31/1996 | EP0695034A1 Dynamic to static logic tunable pulse catcher |
| 01/31/1996 | EP0694231A1 Noise isolated i/o buffer |
| 01/30/1996 | US5488612 Method and apparatus for field testing field programmable logic arrays |
| 01/30/1996 | US5488582 Non-disruptive, randomly addressable memory system |
| 01/30/1996 | US5488326 Data output circuit for semiconductor integrated circuit device which prevents current flow from the output to supply voltage |
| 01/30/1996 | US5488322 Digital interface circuit with dual switching points for increased speed |
| 01/30/1996 | US5488319 Latch interface for self-reset logic |
| 01/30/1996 | US5488317 Wired logic functions on FPGA's |
| 01/30/1996 | US5488316 Circuit for selecting a bit in a look-up table |
| 01/30/1996 | US5488315 Adder-based base cell for field programmable gate arrays |
| 01/30/1996 | US5488288 Circuit arrangement integrated in a semiconductor circuit |
| 01/28/1996 | CA2152109A1 Current mode driver for differential bus |
| 01/25/1996 | DE4425624A1 Potential rise accelerating circuit for logic bus line |
| 01/25/1996 | DE19525758A1 Reprogrammable programmable logic array |
| 01/24/1996 | EP0693827A2 Quasi-static adiabatic gates |
| 01/24/1996 | EP0693826A1 High performance drive structure for mosfet power switches |
| 01/23/1996 | US5487038 Method for read cycle interrupts in a dynamic read-only memory |
| 01/23/1996 | US5487025 Carry chain adder using regenerative push-pull differential logic |
| 01/23/1996 | US5486782 Transmission line output driver |
| 01/23/1996 | US5486780 Tri-stateable current mirror sense amplifier |
| 01/23/1996 | US5486778 Input buffer for translating TTL levels to CMOS levels |
| 01/23/1996 | US5486777 Low power differential receiver input circuit |
| 01/23/1996 | US5486776 Antifuse-based programmable logic circuit |
| 01/23/1996 | US5486775 Multiplexer structures for use in making controllable interconnections in integrated circuits. |
| 01/23/1996 | US5486774 CMOS logic circuits having low and high-threshold voltage transistors |
| 01/19/1996 | CA2151850A1 Hot-clock adiabatic gate using multiple clock signals with different phases |
| 01/18/1996 | WO1996001499A1 A general purpose, non-volatile reprogrammable switch |
| 01/17/1996 | EP0692877A2 Drive circuit |
| 01/17/1996 | EP0692873A1 Apparatus for converting optical bipolar signals to optical unipolir signals |
| 01/17/1996 | EP0692825A2 Analogue MISFET with threshold voltage adjuster |
| 01/17/1996 | EP0669057A4 Programmable logic devices and configurable logic networks. |
| 01/17/1996 | EP0669055A4 Programmable logic networks. |
| 01/16/1996 | US5485114 Semiconductor integrated circuit with internal compensation for changes in time delay |
| 01/16/1996 | US5485110 ECL differential multiplexing circuit |
| 01/16/1996 | US5485107 Backplane driver circuit |
| 01/16/1996 | US5485106 ECL to CMOS converter |
| 01/16/1996 | US5485104 Logic allocator for a programmable logic device |
| 01/16/1996 | US5485103 Programmable logic array with local and global conductors |
| 01/16/1996 | US5485102 Programmable logic devices with spare circuits for replacement of defects |
| 01/11/1996 | WO1996001009A1 A noise-reducing programmable output circuit |
| 01/11/1996 | WO1995031043A3 Semiconductor device for the summation of a number of weighted input signals |
| 01/09/1996 | USRE35141 Substrate bias generating circuit |
| 01/09/1996 | US5483205 Low power oscillator |
| 01/09/1996 | US5483189 Input/output adapted to operate with low and high voltages |
| 01/09/1996 | US5483184 Programmable CMOS bus and transmission line receiver |
| 01/09/1996 | US5483181 Dynamic logic circuit with reduced charge leakage |
| 01/09/1996 | US5483179 Data output drivers with pull-up devices |
| 01/09/1996 | US5483178 Programmable logic device with logic block outputs coupled to adjacent logic block output multiplexers |
| 01/09/1996 | US5483177 Integrated circuit having a noise-reducing output stage with mutually-delayed activation circuit |
| 01/09/1996 | US5483176 Low power module |
| 01/09/1996 | US5483152 Wide range power supply for integrated circuits |
| 01/09/1996 | US5483110 Signal transmission method, signal transmission circuit and information processing system using same |
| 01/09/1996 | US5483093 Input protection device for electronic device |
| 01/03/1996 | EP0690579A2 Field programmable gate arrays |
| 01/03/1996 | EP0690578A1 MOSFET interface circuit having an increased or a reduced mutual conductance |
| 01/03/1996 | EP0690577A1 Fast propagation technique in CMOS integrated circuits |
| 01/03/1996 | EP0690569A2 High speed synchronous logic data latch apparatus |
| 01/03/1996 | EP0689736A1 Semiconductor device |
| 01/03/1996 | EP0689712A1 Random access memory (ram) based configurable arrays |
| 01/02/1996 | US5481555 System and method for error detection and reducing simultaneous switching noise |
| 01/02/1996 | US5481500 Precharged bit decoder and sense amplifier with integrated latch usable in pipelined memories |
| 01/02/1996 | US5481486 Look up table implementation of fast carry arithmetic and exclusive-OR operations |
| 01/02/1996 | US5481228 Method and apparatus for controlling oscillator duty cycle |
| 01/02/1996 | US5481222 Power conserving integrated circuit |
| 01/02/1996 | US5481213 Cross-conduction prevention circuit for power amplifier output stage |
| 01/02/1996 | US5481210 Method for controlling clock frequency of a digital logic semiconductor according to temperature |
| 01/02/1996 | US5481209 Clock distribution and control in an integrated circuit |
| 01/02/1996 | US5481208 Piecewisely-controlled tri-state output buffer |
| 01/02/1996 | US5481207 High speed, low power input/output circuit for a multi-chip module |
| 01/02/1996 | US5481206 Circuit for fast carry and logic |
| 12/31/1995 | CA2130239A1 Method for protecting netlists provided for simulation |
| 12/28/1995 | CA2150490A1 Backplane bus for differential signals |
| 12/27/1995 | EP0689293A2 Mixed voltage output buffer circuit |
| 12/27/1995 | EP0689291A2 MOS driver circuit |
| 12/26/1995 | US5479124 Slew rate controller for high speed bus |
| 12/26/1995 | US5479117 Hybrid data processing system including pulsed-power-supply CMOS circuits |
| 12/26/1995 | US5479116 Level conversion circuits for converting a digital input signal varying between first and second voltage levels to a digital output signal varying between first and third voltage levels |
| 12/26/1995 | US5479115 Signal processing device and level converter circuit |
| 12/26/1995 | US5479114 Three-value input buffer circuit |
| 12/26/1995 | US5479113 User-configurable logic circuits comprising antifuses and multiplexer-based logic modules |