| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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| 04/02/1996 | US5504439 I/O interface cell for use with optional pad |
| 03/27/1996 | EP0703671A1 Interface circuit lying between a logic circuit having a low supply voltage and a TTL- or a CMOS-logic circuit |
| 03/27/1996 | EP0703670A2 Output buffer circuit |
| 03/27/1996 | EP0703668A2 Self-resetting CMOS multiplexer with static output driver |
| 03/27/1996 | EP0703665A2 Voltage level shift circuit |
| 03/27/1996 | EP0703622A2 Electrostatic discharge protection circuits for mixed voltage interface and multi-rail disconnected power grid applications |
| 03/27/1996 | EP0702861A1 Voltage translation and overvoltage protection |
| 03/27/1996 | EP0702860A1 Overvoltage protection |
| 03/27/1996 | EP0702859A1 Btl compatible cmos line driver |
| 03/27/1996 | EP0702858A1 High voltage cmos logic using low voltage cmos process |
| 03/27/1996 | EP0702812A1 Cmos bus and transmission line receiver |
| 03/27/1996 | EP0581914B1 Reference voltage generator for dynamic random access memory |
| 03/26/1996 | US5502820 Microprocessor having high speed, low noise output buffers |
| 03/26/1996 | US5502680 Sense amplifier with pull-up circuit for accelerated latching of logic level output data |
| 03/26/1996 | US5502672 Data output buffer control circuit |
| 03/26/1996 | US5502417 Input amplifier circuit |
| 03/26/1996 | US5502416 Adjustable reset threshold for an integrated regulator |
| 03/26/1996 | US5502407 Low-power-dissipation CMOS circuits |
| 03/26/1996 | US5502406 Low power level shift circuit and method therefor |
| 03/26/1996 | US5502405 Method and apparatus for CML/EC to CMOS/TTL translators |
| 03/26/1996 | US5502404 Gate array cell with predefined connection patterns |
| 03/26/1996 | US5502403 High speed configuration independent programmable macrocell |
| 03/26/1996 | US5502402 FPGA architecture based on a single configurable logic module |
| 03/26/1996 | US5502401 Controllable width or gate |
| 03/21/1996 | WO1996008871A1 Controlled slew rate output buffer |
| 03/21/1996 | WO1996008870A1 Semiconductor device |
| 03/21/1996 | WO1996008801A2 Data link module for time division multiplexing control systems |
| 03/21/1996 | WO1996008761A1 Complementary field-effect transistor logic circuits for wave pipelining |
| 03/21/1996 | CA2176135A1 Data link module for time division multiplexing control systems |
| 03/20/1996 | EP0702456A2 Power-consumption reduction circuit and method |
| 03/20/1996 | EP0701713A1 Field programmable logic device with dynamic interconnections to a dynamic logic core |
| 03/19/1996 | US5500615 Low power CCD driver with symmetrical output drive signal |
| 03/19/1996 | US5500614 Semiconductor memory device |
| 03/19/1996 | US5500611 Integrated circuit with input/output pad having pullup or pulldown |
| 03/19/1996 | US5500610 Very high current integrated circuit output buffer with short circuit protection and reduced power bus spikes |
| 03/19/1996 | US5500609 Wildcard addressing structure for configurable cellular array |
| 03/19/1996 | US5500608 Logic cell for field programmable gate array having optional internal feedback and optional cascade |
| 03/13/1996 | EP0701328A2 Field programmable gate array |
| 03/13/1996 | EP0701327A2 BiCMOS push-pull type logic apparatus with voltage clamp circuit and clamp releasing circuit |
| 03/13/1996 | EP0700599A1 Cmos input with v cc? compensated dynamic threshold |
| 03/13/1996 | EP0700598A1 Negative voltage generator for flash eprom design |
| 03/13/1996 | CN1031305C Analog macro embedded in digital gate array |
| 03/12/1996 | US5498980 Ternary/binary converter circuit |
| 03/12/1996 | US5498979 Adaptive programming method for antifuse technology |
| 03/12/1996 | US5498978 Field programmable gate array |
| 03/12/1996 | US5498977 Output driver having process, voltage and temperature compensation for delay and risetime |
| 03/12/1996 | US5498975 Implementation of redundancy on a programmable logic device |
| 03/12/1996 | CA1338155C Bidirection buffer with latch and parity capability |
| 03/07/1996 | WO1996007238A1 High speed digital buffer, driver or level shifter circuit |
| 03/06/1996 | EP0700162A1 Logic circuit with differential stages |
| 03/06/1996 | EP0700052A1 Sample-and-hold, bipolar transistor circuitry |
| 03/06/1996 | EP0699322A1 Control module for reducing ringing in digital signals on a transmission line |
| 03/05/1996 | US5497117 Input sense circuit having selectable thresholds |
| 03/05/1996 | US5497113 Variable-slope driver for pullup-terminated transmission lines |
| 03/05/1996 | US5497108 BICMOS repeater circuit for a programmable logic device |
| 03/05/1996 | US5497107 Multiple, selectable PLAS having shared inputs and outputs |
| 03/05/1996 | US5497106 BICMOS output buffer circuit having overshoot protection |
| 03/05/1996 | US5497105 Programmable output pad with circuitry for reducing ground bounce noise and power supply noise and method therefor |
| 02/28/1996 | EP0698979A2 Current mode driver for differential bus |
| 02/28/1996 | EP0698967A2 Circuit with at least two different logic families |
| 02/28/1996 | EP0698925A2 Bipolar transistor with floating base |
| 02/28/1996 | EP0698312A1 Tile based architecture for fpga |
| 02/28/1996 | EP0698294A1 Logical three-dimensional interconnections between integrated circuit chips using a two-dimensional multi-chip module package |
| 02/28/1996 | EP0698235A1 Bias voltage distribution system |
| 02/28/1996 | CN1117671A Fast propagation technique in CMOS integrated circuits |
| 02/28/1996 | CN1117614A Electronic system, semiconductor integrated circuit and termination device |
| 02/27/1996 | US5495446 Pre-charged exclusionary wired-connected programmed redundant select |
| 02/27/1996 | US5495422 Method for combining a plurality of independently operating circuits within a single package |
| 02/27/1996 | US5495198 Snubbing clamp network |
| 02/27/1996 | US5495195 Output buffer for a high density programmable logic device |
| 02/27/1996 | US5495191 Single ended dynamic sense amplifier |
| 02/27/1996 | US5495189 Non-overlap signal generation circuit |
| 02/27/1996 | US5495188 Pulsed static CMOS circuit |
| 02/27/1996 | US5495187 CMOS input with Vcc compensated dynamic threshold |
| 02/27/1996 | US5495186 Differential type MOS transmission circuit |
| 02/27/1996 | US5495185 CMOS level conversion circuit with input protection |
| 02/27/1996 | US5495184 High-speed low-power CMOS PECL I/O transmitter |
| 02/27/1996 | US5495183 Level conversion circuitry for a semiconductor integrated circuit |
| 02/27/1996 | US5495182 Fast-fully restoring polarity control circuit |
| 02/27/1996 | US5495099 High speed super push-pull logic (SPL) circuit using bipolar technology |
| 02/22/1996 | WO1996005656A1 Time multiplexed ratioed logic |
| 02/22/1996 | WO1996005655A1 Improvements in a vlsi memory circuit |
| 02/22/1996 | DE19500393C1 Circuit arrangement for switching high voltages on semiconductor chip |
| 02/21/1996 | EP0697766A1 Buffer circuit with wide dynamic range |
| 02/21/1996 | EP0697757A1 Electrostatic discharge protection circuit for an integrated circuit device |
| 02/21/1996 | EP0697649A2 Structure and method for shifting and reordering a plurality of data bytes |
| 02/20/1996 | US5493244 Breakdown protection circuit using high voltage detection |
| 02/20/1996 | US5493240 Static combinatorial logic circuits for reversible computation |
| 02/20/1996 | US5493235 Programmable and stable threshold CMOS inverter |
| 02/20/1996 | US5493233 MOSFET circuit apparatus with avalanche breakdown prevention means |
| 02/15/1996 | WO1996004714A1 Level converting circuit |
| 02/14/1996 | EP0696850A1 Digital voltage level shifters and systems using the same |
| 02/14/1996 | EP0696847A2 Voltage-to-current converting circuit operating with low supply voltage |
| 02/14/1996 | EP0696802A2 Precharged bit decoder and sense amplifier with integrated latch usable in pipelined memories |
| 02/14/1996 | EP0696393A1 Dc-coupled active pull-down ecl circuit with self-adjusting drive capability |
| 02/13/1996 | US5491436 Compensated CMOS driver circuit with reduced DC losses |
| 02/13/1996 | US5491433 Cascode array cell partitioning for a sense amplifier of a programmable logic device |
| 02/13/1996 | US5491432 CMOS Differential driver circuit for high offset ground |
| 02/13/1996 | US5491431 Logic module core cell for gate arrays |
| 02/13/1996 | US5491430 Semiconductor integrated circuit device with data output circuit |