Patents
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
01/1995
01/03/1995US5378943 Low power interface circuit
01/03/1995US5378942 CMOS dynamic logic structure
01/03/1995US5378941 Bipolar transistor MOS transistor hybrid semiconductor integrated circuit device
01/03/1995US5378940 Charge recovery logic including split level logic
01/03/1995US5378932 Level shifting circuit
12/1994
12/27/1994US5377156 Semiconductor device incorporating main and stand-by boosted internal power supply for compensating for deviation on operating condition and fabrication process conditions
12/27/1994US5377123 Programmable logic device
12/27/1994US5376898 Semiconductor integrated circuit device
12/27/1994US5376846 Temperature compensation circuit and method of operation
12/27/1994US5376845 Apparatus and method for ECL-like signal to CMOS signal conversion
12/27/1994US5376844 Programmable logic device with multiplexer-based programmable interconnections
12/27/1994US5376843 TTL input buffer with on-chip reference bias regulator and decoupling capacitor
12/27/1994US5376837 Semiconductor integrated circuit device having built-in voltage drop circuit
12/22/1994WO1994029963A1 Voltage translation and overvoltage protection
12/22/1994WO1994029962A1 Cmos btl compatible bus and transmission line driver
12/22/1994WO1994029961A1 Overvoltage protection
12/22/1994WO1994029799A1 Cmos bus and transmission line receiver
12/21/1994EP0630115A2 Configurable logic array
12/21/1994EP0630114A2 Low current optional inverter
12/21/1994EP0630113A2 Integrated logic circuit with a single ended input logic gate
12/21/1994EP0630112A2 Transparent latch circuit
12/21/1994EP0630110A1 Level conversion circuit
12/21/1994EP0630109A2 Low-voltage output driving circuit
12/21/1994EP0630103A2 Emitterfollower circuit and analog to digital converter using such circuit
12/21/1994EP0629321A1 Circuit, counter and frequency synthesizer with adjustable bias current
12/20/1994USRE34808 TTL/CMOS compatible input buffer with Schmitt trigger
12/20/1994US5375086 Dynamic control of configurable logic
12/20/1994US5374862 Super buffer and DCFL circuits with Schottky barrier diode
12/20/1994US5374858 Bus driver circuit
12/19/1994CA2125307A1 Configurable logic array
12/16/1994CA2125827A1 Level conversion circuit
12/15/1994DE4342821C1 Electronic memory circuit
12/15/1994DE4319977A1 Circuit arrangement for suppressing dynamic interference in digital circuits
12/14/1994EP0629047A2 Low-voltage high-current BiCMOS output circuit
12/14/1994EP0628226A1 BiCMOS LOGIC CIRCUIT
12/13/1994US5373510 Test circuit of input architecture of erasable and programmable logic device
12/13/1994US5373470 Method and circuit for configuring I/O devices
12/13/1994US5373469 Differential amplifier with a latching function and a memory apparatus employing same
12/13/1994US5373252 Circuit for preventing saturation of a transistor
12/13/1994US5373203 Decoder and latching circuit with differential outputs
12/13/1994US5373202 Three state input circuit for an integrated circuit
12/13/1994US5373199 MOS transistor output circuit
12/08/1994WO1994028629A1 Negative voltage generator for flash eprom design
12/08/1994WO1994028477A1 Method and apparatus for power control in devices
12/08/1994WO1994028475A1 Field programmable logic device with dynamic interconnections to a dynamic logic core
12/08/1994DE4407953A1 Signal input/output circuit for integrated semiconductor circuit
12/07/1994EP0627819A1 Level conversion circuit for signal of ECL-level
12/07/1994EP0627816A1 Synchronized clocking disable and enable circuits
12/06/1994US5371713 Semiconductor integrated circuit
12/06/1994US5371705 Internal voltage generator for a non-volatile semiconductor memory device
12/06/1994US5371424 Transmitter/receiver circuit and method therefor
12/06/1994US5371423 Tri-state-capable driver circuit
12/06/1994US5371422 Programmable logic device having multiplexers and demultiplexers randomly connected to global conductors for interconnections between logic elements
12/06/1994US5371421 Low power BiMOS amplifier and ECL-CMOS level converter
12/06/1994US5371420 Output circuit having reduced switching noise
12/06/1994US5371414 Simultaneous multiple antifuse programming method
12/01/1994DE4341667C1 Integrated circuit arrangement having at least one CMOS NAND gate and method for the production thereof
11/1994
11/30/1994EP0626760A2 Electronic system organized in matrix cell network
11/30/1994EP0626759A2 Adiabatic dynamic noninverting circuitry
11/30/1994EP0626758A2 Adiabatic dynamic precharge boost circuitry
11/30/1994EP0626757A2 Adiabatic dynamic logic
11/30/1994EP0626756A2 Output circuit having three power supply lines
11/30/1994EP0626726A2 Simultaneous multiple antifuse programming method
11/30/1994EP0626113A1 Self-compensating digital delay semiconductor device with selectable output delays and method therefor
11/30/1994EP0626112A1 Compensated digital delay semiconductor device with selectable output taps and method therefor
11/29/1994US5369772 Method of maximizing data pin usage utilizing post-buffer feedback
11/29/1994US5369646 Semiconductor integrated circuit device having test circuit
11/29/1994US5369520 Optical regeneration circuit
11/29/1994US5369320 Bootstrapped high-speed output buffer
11/29/1994US5369318 Level translator capable of high speed operation
11/29/1994US5369317 Circuit and method for controlling the potential of a digit line and in limiting said potential to a maximum value
11/29/1994US5369316 Advanced output buffer with reduced voltage swing at output terminal
11/29/1994US5369315 High speed signal driving scheme
11/29/1994US5369314 Programmable logic device with redundant circuitry
11/29/1994US5369313 High frequency gain differential signal circuit employing a level shift device
11/29/1994US5369312 Hot carrier protection circuit
11/29/1994CA2122806A1 Adiabatic dynamic precharge boost circuitry
11/29/1994CA2117027A1 Adiabatic dynamic logic
11/24/1994WO1994027225A1 Control module for reducing ringing in digital signals on a transmission line
11/24/1994WO1994027204A2 Bias voltage distribution system
11/24/1994CA2162180A1 Bias voltage distribution system
11/23/1994EP0625825A1 Low-power consumption BI-CMOS circuit formed by a small number of circuit components
11/23/1994EP0625824A2 Semiconductor integrated circuit device
11/23/1994EP0625755A2 Median value detection technique
11/23/1994CA2122805A1 Adiabatic dynamic noninverting circuitry
11/22/1994US5367210 Output buffer with reduced noise
11/22/1994US5367209 Field programmable gate array for synchronous and asynchronous operation
11/22/1994US5367208 Reconfigurable programmable interconnect architecture
11/22/1994US5367207 Structure and method for programming antifuses in an integrated circuit array
11/22/1994US5367205 High speed output buffer with reduced voltage bounce and no cross current
11/22/1994US5367201 Control circuit system for control of parameters in logic circuits or similar
11/17/1994EP0624953A2 Field programmable gate array and semiconductor integtrated circuit
11/17/1994EP0624952A2 Integrated circuit with a low-power mode and clock amplifier circuit for same
11/15/1994US5365165 Testability architecture and techniques for programmable interconnect architecture
11/15/1994US5365130 Self-compensating output pad for an integrated circuit and method therefor
11/15/1994US5365127 Circuit for conversion from CMOS voltage levels to shifted ECL voltage levels with process compensation
11/15/1994US5365125 Logic cell for field programmable gate array having optional internal feedback and optional cascade
11/15/1994US5365124 BiCMOS logic circuit
11/15/1994US5365123 Semiconductor logic circuits with diodes and amplitude limiter
11/15/1994US5365117 Logic gates having fast logic signal paths through switchable capacitors