| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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| 07/23/2002 | US6424177 Universal single-ended parallel bus |
| 07/23/2002 | US6424176 Logic circuits used for address decoding |
| 07/23/2002 | US6424175 Biased control loop circuit for setting impedance of output driver |
| 07/23/2002 | US6424174 Low leakage logic gates |
| 07/23/2002 | US6424173 Voltage translators with zero static power and predictable performance |
| 07/23/2002 | US6424171 Base cell and two-dimensional array of base cells for programmable logic LSI |
| 07/23/2002 | US6424170 Apparatus and method for linear on-die termination in an open drain bus architecture system |
| 07/23/2002 | US6423553 Method of making a magnetoelectronic device |
| 07/18/2002 | WO2002056515A2 Double data rate flip-flop |
| 07/18/2002 | WO2002056473A2 Sub-micron high input voltage tolerant input output (i/o) circuit |
| 07/18/2002 | WO2002056449A1 Local supply generator for a digital cmos integrated circuit having an analog signal processing circuitry |
| 07/18/2002 | WO2002056180A2 User configurable on-chip memory system |
| 07/18/2002 | WO2002027931A3 Method and apparatus for asynchronously controlling state information within a circuit |
| 07/18/2002 | WO2001067607B1 Dynamic phase logic gate |
| 07/18/2002 | US20020095649 Optimized emulation and prototyping architecture |
| 07/18/2002 | US20020094658 Blocking of boron diffusion through the emitter-emitter poly interface in PNP HBTs through use of a SiC layer at the top of the emitter EPI layer |
| 07/18/2002 | US20020093371 Integrated circuit device |
| 07/18/2002 | US20020093369 Dynamic flip flop |
| 07/18/2002 | US20020093366 Wide-band replica output current sensing circuit |
| 07/18/2002 | US20020093362 Level conversion circuit as well as semiconductor device and display unit comprising the same |
| 07/18/2002 | US20020093347 Low power wired OR |
| 07/18/2002 | US20020093068 Magnetoelectronic memory element with inductively coupled write wires |
| 07/18/2002 | CA2432308A1 Double data rate flip-flop |
| 07/17/2002 | EP1223663A1 Local supply generator for a digital CMOS integrated circuit having an analog signal processing circuitry |
| 07/17/2002 | EP1222739A1 Reconfigurable gate array |
| 07/17/2002 | EP1222621A1 Integrated circuit and circuit arrangement for supplying an integrated circuit with electricity |
| 07/17/2002 | EP1110322B1 Electronic circuit |
| 07/16/2002 | US6421812 Programming mode selection with JTAG circuits |
| 07/16/2002 | US6420936 Power controller and power controlling method |
| 07/16/2002 | US6420924 Slew-controlled split-voltage output driver |
| 07/16/2002 | US6420913 Dynamic termination logic driver with improved impedance control |
| 07/16/2002 | US6420907 Method and apparatus for asynchronously controlling state information within a circuit |
| 07/16/2002 | US6420905 Vented CMOS dynamic logic system |
| 07/16/2002 | US6420904 Domino logic with self-timed precharge |
| 07/16/2002 | US6420901 Quantized queue length arbiter |
| 07/16/2002 | US6420900 Semiconductor memory |
| 07/16/2002 | US6420898 Input/output buffer capable of supporting a multiple of transmission logic buses |
| 07/16/2002 | US6420895 High-sensitivity, self-clocked receiver for multi-chip superconductor circuits |
| 07/11/2002 | WO2002054771A2 Multi-standard channel decoder for real-time digital broadcast reception |
| 07/11/2002 | WO2002054596A1 Method and apparatus for a failure-free synchronizer |
| 07/11/2002 | WO2002054594A1 Architecture for field programmable gate array |
| 07/11/2002 | WO2002037679A8 Transmitter circuit comprising timing deskewing means |
| 07/11/2002 | US20020089369 Voltage conversion circuit |
| 07/11/2002 | US20020089367 Circuit configuration for supplying voltage to an integrated circuit via a pad |
| 07/11/2002 | US20020089354 Apparatus and method of providing a four input logic function |
| 07/11/2002 | US20020089353 Current mode logic gates for low-voltage high-speed applications |
| 07/11/2002 | US20020089352 Method of reducing sub-threshold leakage in circuits during standby mode |
| 07/11/2002 | US20020089351 Integrated circuit and method of controlling output impedance |
| 07/11/2002 | US20020089350 Dual rail power supply sequence tolerant off-chip driver |
| 07/11/2002 | US20020089349 Reconfigurable integrated circuit with integrated debugging facilities and scalable programmable interconnect |
| 07/11/2002 | US20020089348 Programmable logic integrated circuit devices including dedicated processor components |
| 07/11/2002 | US20020089018 Semiconductor device |
| 07/11/2002 | US20020088997 Integrated circuit and circuit configuration for supplying power to an integrated circuit |
| 07/11/2002 | DE10134019A1 Integrierte Halbleiterschaltung A semiconductor integrated circuit |
| 07/11/2002 | DE10062082A1 Elektrische Schaltung Electrical circuit |
| 07/10/2002 | EP1221771A1 High configurability output-buffer circuit |
| 07/10/2002 | CN1357973A Terminal circuit and its method |
| 07/10/2002 | CN1357893A Method and device of using compressed data in far-end fuse box to initialize integrated circuit |
| 07/10/2002 | CN1087522C Bi CMOS ECL-CMOS level converter |
| 07/09/2002 | US6418399 Method for executing individual algorithms using a reconfigurable circuit, and apparatus for carrying out the method |
| 07/09/2002 | US6417776 Input buffer circuit having function for detecting cable connection |
| 07/09/2002 | US6417721 Device and method for limiting the extent to which circuits in integrated circuit dice electrically load bond pads and other circuit nodes in the dice |
| 07/09/2002 | US6417705 Output driver with DLL control of output driver strength |
| 07/09/2002 | US6417696 Interface circuit for mixed voltage I/O buffer to provide gate oxide protection |
| 07/09/2002 | US6417695 Antifuse reroute of dies |
| 07/09/2002 | US6417694 Programmable logic device with hierarchical interconnection resources |
| 07/09/2002 | US6417693 Hybrid product term and look-up table-based programmable logic device with improved speed and area efficiency |
| 07/09/2002 | US6417692 Programmable I/O cells with multiple drivers |
| 07/09/2002 | US6417690 Floor plan for scalable multiple level tab oriented interconnect architecture |
| 07/09/2002 | US6417689 Method and apparatus for placing output signals having different voltage levels on output pins of a programmable logic device |
| 07/04/2002 | WO2002052648A1 Improved architecture and interconnect for programmable logic circuits |
| 07/04/2002 | WO2002052290A1 Asynchronous reset circuit testing |
| 07/04/2002 | US20020087280 Dynamic current calibrated driver circuit |
| 07/04/2002 | US20020085648 Multi-standard channel decoder for real-time digital broadcast reception |
| 07/04/2002 | US20020084837 CMOS-microprocessor chip and package anti-resonance method |
| 07/04/2002 | US20020084835 Semiconductor device with reduced leakage of current |
| 07/04/2002 | US20020084834 Voltage generating/transferring circuit |
| 07/04/2002 | US20020084826 Reduced current variability I/O bus termination |
| 07/04/2002 | US20020084825 Small swing output buffer for reducing EMI |
| 07/04/2002 | US20020084820 Reduction of propagation delay dependence on supply voltage in a digital circuit |
| 07/04/2002 | US20020084810 Method for outputting data and circuit configuration with driver circuit |
| 07/04/2002 | US20020084807 Asynchronous FIFO circuit and method of reading and writing data through asynchronous FIFO circuit |
| 07/04/2002 | US20020084806 Low voltage bipolar logic and gate device |
| 07/04/2002 | US20020084805 Differential-input circuit |
| 07/04/2002 | US20020084804 Semiconductor integrated circuit device having power reduction mechanism |
| 07/04/2002 | US20020084802 Voltage level shifter having zero DC current and state retention in drowsy mode |
| 07/04/2002 | US20020084801 Programmable logic device architectures with super-regions having logic regions and a memory region |
| 07/03/2002 | EP1220451A1 Power polarity reversal protecting circuit for an integrated circuit |
| 07/03/2002 | EP1220450A2 Semiconductor integrated circuit |
| 07/03/2002 | EP1219031A1 Integrated circuit including dedicated and programmable logic |
| 07/03/2002 | EP1218545A2 Compositions and methods for preparing oligonucleotide solutions |
| 07/03/2002 | EP1177631A4 Heterogeneous programmable gate array |
| 07/03/2002 | EP0931380B1 Reconfigurable computing system |
| 07/02/2002 | US6415419 Semiconductor integrated circuit device and circuit designing method therefor |
| 07/02/2002 | US6415405 Method and apparatus for scan of synchronized dynamic logic using embedded scan gates |
| 07/02/2002 | US6414894 Semiconductor device with reduced current consumption in standby state |
| 07/02/2002 | US6414531 Circuit configuration for adjusting signal delay times |
| 07/02/2002 | US6414525 I/O interface circuit, semiconductor chip and semiconductor system |
| 07/02/2002 | US6414519 Equal delay current-mode logic circuit |
| 07/02/2002 | US6414518 Circuitry for a low internal voltage integrated circuit |