Patents
Sitemap › H03 - Basic electronic circuitry › H03K - Pulse technique › H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
12/2002
12/19/2002WO2002101926A2 Integrated circuit and method for testing the integrated circuit
12/19/2002WO2002101527A1 Low power clock distribution methodology
12/19/2002US20020194543 Enhanced embedded logic analyzer
12/19/2002US20020194522 Operation report creation system, operation report creation method, and operation report creation program
12/19/2002US20020194449 Method for sharing configuration data for high logic density on chip
12/19/2002US20020191727 Digital phase locked loop
12/19/2002US20020191480 Clock synchronous semiconductor memory device
12/19/2002US20020191460 Clocked pass transistor and complementary pass transistor logic circuits
12/19/2002US20020191037 Printhead board, printhead and printing apparatus
12/19/2002US20020190795 Method and apparatus for gain compensation and control in low voltage differential signaling applications
12/19/2002US20020190775 Low power clock distribution methodology
12/19/2002US20020190770 Current -controlled CMOS circuit using higher voltage supply in low voltage CMOS process
12/19/2002US20020190758 Trading off gate delay versus leakage current using device stack effect
12/19/2002US20020190756 CMOS parallel dynamic logic and speed enhanced skewed state logic
12/19/2002US20020190753 Programmable burst fifo
12/19/2002US20020190752 High speed semiconductor circuit having low power consumption
12/19/2002US20020190751 Programmable logic device with high speed serial interface circuitry
12/19/2002US20020190750 One cell programmable switch using non-volatile cell with unidirectional and bidirectional states
12/19/2002US20020190749 One cell programmable switch using non-volatile cell
12/19/2002US20020190748 Four state programmable interconnect device for bus line and I/O pad
12/19/2002US20020190744 Semiconductor integrated circuit and testing method thereof
12/19/2002US20020190381 Capacitor for signal propagation across ground plane boundaries in superconductor integrated circuits
12/19/2002US20020190326 Pulse output circuit, shift register, and display device
12/19/2002DE10220161A1 Schnittstelle Interface
12/18/2002EP1267412A2 Capacitor for signal propagation across ground plane boundaries in superconductor integrated circuits
12/18/2002EP1267287A2 High-level synthesis apparatus and method, method for producing logic circuit using the high-level synthesis method, and recording medium
12/18/2002EP1266758A2 Printhead board, printhead and printing apparatus
12/18/2002EP1266452A2 Mixed swing voltage repeaters for high resistance or high capacitance signal lines and methods therefor
12/18/2002CN1386348A Digital interface with low power consumption
12/18/2002CN1385966A Digital logic analog method
12/18/2002CN1385965A High-speed data buffer
12/18/2002CN1385825A Pulse output circuit, shift register and display device
12/18/2002CN1096749C 5V tolerant input/output circuit
12/18/2002CN1096748C Dynamic CMOS circuits with noise immunity
12/18/2002CN1096747C 保护电路 Protection circuit
12/18/2002CN1096746C Output buffer switching circuit
12/18/2002CN1096712C Output driver for mixed supply voltage systems
12/17/2002US6496971 Supporting multiple FPGA configuration modes using dedicated on-chip processor
12/17/2002US6496887 SRAM bus architecture and interconnect to an FPGA
12/17/2002US6496070 Buffer circuit comprising load, follower transistor and current source connected in series
12/17/2002US6496054 Control signal generator for an overvoltage-tolerant interface circuit on a low voltage process
12/17/2002US6496051 Output sense amplifier for a multibit memory cell
12/17/2002US6496049 Semiconductor integrated circuit having a current control function
12/17/2002US6496044 High-speed output circuit with low voltage capability
12/17/2002US6496041 Logic cell and logic circuit using the same
12/17/2002US6496040 Trading off gate delay versus leakage current using device stack effect
12/17/2002US6496038 Pulsed circuit topology including a pulsed, domino flip-flop
12/17/2002US6496037 Automatic off-chip driver adjustment based on load characteristics
12/17/2002US6496036 Input-output buffer circuit
12/17/2002US6496033 Universal logic chip
12/12/2002WO2002039629A9 Channel time calibration means
12/12/2002US20020188923 High-level synthesis apparatus, high-level synthesis method, method for producing logic circuit using the high-level synthesis method, and recording medium
12/12/2002US20020188921 Power saving methods for programmable logic arrays
12/12/2002US20020186801 Output circuit
12/12/2002US20020186597 Method and apparatus for adaptive address bus coding for low power deep sub-micron designs
12/12/2002US20020186596 Semiconductor device with data output circuit having slew rate adjustable
12/12/2002US20020186071 Semiconductor integrated circuit device including a substrate bias controller and a current limiting circuit
12/12/2002US20020186066 Variable impedance circuit
12/12/2002US20020186064 Delay circuit having low operating environment dependency
12/12/2002US20020186060 Complementary signal generation circuit
12/12/2002US20020186059 Reduced voltage swing digital differential driver
12/12/2002US20020186058 Buffer interface architecture
12/12/2002US20020186050 Logic circuit for true and complement signal generator
12/12/2002US20020186049 Command user interface with programmable decoder
12/12/2002US20020186047 Internally and externally biased dual mode 1394 compliant driver
12/12/2002US20020186045 Cell architecture to reduce customization in a semiconductor device
12/12/2002US20020186044 Variable grain architecture for FPGA integrated circuits
12/12/2002US20020186043 DSP integrated with programmable logic based accelerators
12/12/2002US20020186040 Semiconductor logic circuit device of low current consumption
12/11/2002EP1265363A2 Adjustable temperature-compensated threshold circuit with trip-points exceeding the given supplies
12/11/2002EP1265361A2 Complementary signal generation circuit
12/11/2002EP1265185A2 Parallel signal procesing circuit, semiconductor device having the circuit, and signal processing system having the circuit
12/11/2002EP1265149A2 Internally and externally biased dual mode 1394 compliant driver
12/11/2002EP1264406A2 Level-shifter for extremely low power supply
12/11/2002EP1264405A2 Domino logic family
12/11/2002EP1264401A1 Arrangement and method for adjusting the slope times of one or more drivers and a driver circuit
12/11/2002CN1384546A 半导体器件 Semiconductor devices
12/11/2002CN1096147C Semiconductor integral circuit with reduced current leakage and high speed
12/11/2002CN1096118C Intermediate potential generation circuit
12/10/2002US6493274 Data transfer circuit and semiconductor integrated circuit having the same
12/10/2002US6493272 Data holding circuit having backup function
12/10/2002US6492858 Semiconductor integrated circuit and method for generating a control signal therefor
12/10/2002US6492853 Master/slave method for a ZQ-circuitry in multiple die devices
12/10/2002US6492847 Digital driver circuit
12/10/2002US6492846 Semiconductor integrated circuit with input/output interface adapted for small-amplitude operation
12/10/2002US6492842 Logic circuit
12/10/2002US6492841 Integrated NAND and flip-flop circuit
12/10/2002US6492840 Current mode logic gates for low-voltage high-speed applications
12/10/2002US6492839 Low power dynamic logic circuit
12/10/2002US6492838 System and method for improving performance of dynamic circuits
12/10/2002US6492837 Domino logic with output predischarge
12/10/2002US6492835 Power saving methods for programmable logic arrays
12/10/2002US6492834 Programmable logic device with highly routable interconnect
12/10/2002US6492833 Configurable memory design for masked programmable logic
12/10/2002US6492686 Integrated circuit having buffering circuitry with slew rate control
12/05/2002WO2002097638A2 An integrated circuit arrangement with feature control
12/05/2002WO2002097627A1 Validating device for an integrated circuit
12/05/2002US20020184584 Scan flip-flop circuit, logic macro, scan test circuit, and method for laying out the same
12/05/2002US20020184555 Systems and methods for providing automated diagnostic services for a cluster computer system
12/05/2002US20020184426 Method of terminating bus, bus termination resistor, and wiring substrate having terminated buses and method of its manufacture
1 ... 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 ... 420