| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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| 06/13/2002 | US20020070751 Failsafe interface circuit with extended drain services |
| 06/13/2002 | US20020070409 Semiconductor integrated circuit |
| 06/13/2002 | DE10146825A1 Programmierbare Impedanzsteuerschaltung Programmable impedance control circuit |
| 06/12/2002 | EP1213838A1 Integrated circuit device |
| 06/12/2002 | EP1213653A2 Programmable state machine interface |
| 06/12/2002 | EP1212835A1 Multi-clock integrated circuit with clock generator and bi-directional clock pin arrangement |
| 06/12/2002 | EP1212833A1 Driver circuit and method for operating a driver circuit |
| 06/12/2002 | EP1177630A4 Apparatus and methods for dynamically defining variably sized autonomous sub-arrays within a programmable gate array |
| 06/11/2002 | US6405299 Internal bus system for DFPS and units with two- or multi-dimensional programmable cell architectures, for managing large volumes of data with a high interconnection complexity |
| 06/11/2002 | US6404258 Delay circuit having low operating environment dependency |
| 06/11/2002 | US6404254 Latch circuit and semiconductor integrated circuit having the latch circuit with control signal having a large voltage amplitude |
| 06/11/2002 | US6404243 System and method for controlling delay times in floating-body CMOSFET inverters |
| 06/11/2002 | US6404239 Semiconductor integrated circuit device having power reduction mechanism |
| 06/11/2002 | US6404238 Ratio logic gate with a current mirror |
| 06/11/2002 | US6404236 Domino logic circuit having multiplicity of gate dielectric thicknesses |
| 06/11/2002 | US6404235 System and method for reducing latency in a dynamic circuit |
| 06/11/2002 | US6404234 Variable virtual ground domino logic with leakage control |
| 06/11/2002 | US6404233 Method and apparatus for logic circuit transition detection |
| 06/11/2002 | US6404231 Method and apparatus for electrically coupling digital devices |
| 06/11/2002 | US6404230 Level-shifting pass gate |
| 06/11/2002 | US6404228 Apparatus for translating digital signals |
| 06/11/2002 | US6404226 Integrated circuit with standard cell logic and spare gates |
| 06/11/2002 | US6404225 Integrated circuit incorporating a programmable cross-bar switch |
| 06/11/2002 | US6404224 Chain-connected shift register and programmable logic circuit whose logic function is changeable in real time |
| 06/11/2002 | US6404223 Self-terminating current mirror transceiver logic |
| 06/11/2002 | US6404221 Threshold invariant voltage detecting device |
| 06/06/2002 | WO2002045268A1 Semiconductor integrated circuit and data processing system |
| 06/06/2002 | WO2002045267A1 Circuit for receiving and driving a clock-signal |
| 06/06/2002 | WO2002045174A1 Semiconductor device |
| 06/06/2002 | WO2002044876A2 Programmable logic device with decryption algorithm and decryption key |
| 06/06/2002 | WO2002044875A2 Programmable logic device with method of preventing readback |
| 06/06/2002 | WO2001067607A3 Dynamic phase logic gate |
| 06/06/2002 | US20020069394 Method and circuits for performing offline circuit trimming |
| 06/06/2002 | US20020067633 Semiconductor integrated circuit |
| 06/06/2002 | US20020067213 Cascode amplifying circuit and folded cascode amplifying circuit |
| 06/06/2002 | US20020067198 Circuit configuration for generating current pulses in the supply current of integrated circuits |
| 06/06/2002 | US20020067189 Domino logic with low-threshold NMOS pull-up |
| 06/06/2002 | US20020067188 Method and apparatus for reduction of noise sensitivity in dynamic logic circuits |
| 06/06/2002 | US20020067186 Exclusive Or/Nor circuit |
| 06/06/2002 | US20020067185 Failsafe interface circuit with extended drain devices |
| 06/06/2002 | US20020066791 Method and apparatus for communicating with a host |
| 06/05/2002 | EP1211807A1 Digital level adaptation circuit |
| 06/05/2002 | EP1161797A4 Integrated circuit technology |
| 06/05/2002 | EP1142115A4 A method and apparatus for reducing signal transmission delay using skewed gates |
| 06/05/2002 | EP0960476B1 Input buffer circuit |
| 06/05/2002 | EP0740859B1 Electrostatic discharge circuit for high speed, high voltage circuitry |
| 06/04/2002 | US6400635 Memory circuitry for programmable logic integrated circuit devices |
| 06/04/2002 | US6400632 Semiconductor device including a fuse circuit in which the electric current is cut off after blowing so as to prevent voltage fall |
| 06/04/2002 | US6400616 Method of an apparatus for correctly transmitting signals at high speed without waveform distortion |
| 06/04/2002 | US6400598 Programmable logic integrated circuit devices with low voltage differential signaling capabilities |
| 06/04/2002 | US6400546 I/O pad voltage protection circuit and method |
| 06/04/2002 | US6400257 High performance CMOS pseudo dynamic bit comparator with bypass function |
| 06/04/2002 | US6400194 Synchronous feedback digital circuit having a minimized switching power loss |
| 06/04/2002 | US6400192 Electronic circuit provided with a digital driver for driving a capacitive load |
| 06/04/2002 | US6400191 Output circuit, input circuit and input/output circuit |
| 06/04/2002 | US6400189 Buffer circuit |
| 06/04/2002 | US6400184 Transistor output circuit |
| 06/04/2002 | US6400183 Logic circuit and its forming method |
| 06/04/2002 | US6400182 Semiconductor integrated circuit device and method of laying out clock driver used in the semiconductor integrated circuit device |
| 06/04/2002 | US6400181 Method and circuitry for the transmission of signals |
| 06/04/2002 | US6400180 Configurable lookup table for programmable logic devices |
| 06/04/2002 | US6400179 Method for termination of signal lines with discrete biased diodes |
| 06/04/2002 | US6400178 CMOS small signal terminated receiver |
| 06/04/2002 | US6400177 Output driver and method for meeting specified output impedance and current characteristics |
| 06/04/2002 | US6400176 Constant CMOS driver |
| 05/30/2002 | WO2002003459A3 High-speed low-power semiconductor memory architecture |
| 05/30/2002 | US20020063595 Circuit configuration with internal supply voltage |
| 05/30/2002 | US20020063590 Low power circuit with proper slew rate by automatic adjustment of bias current |
| 05/30/2002 | US20020063583 Single event upset immune logic family |
| 05/30/2002 | US20020063582 Semiconductor integrated circuit device |
| 05/30/2002 | US20020063581 Input buffer of a semiconductor device that gives only a small scattering in delay time |
| 05/30/2002 | US20020063580 Digital level adjustment |
| 05/30/2002 | US20020063579 Power saving methods for programmable logic arrays |
| 05/30/2002 | US20020063578 Dynamic programmable logic array that can be reprogrammed and a method of use |
| 05/30/2002 | US20020063576 Programmable impedance control circuit |
| 05/30/2002 | US20020063284 Semiconductor device and a method of manufacturing the same |
| 05/29/2002 | EP1208627A1 Circuits for dynamic turn off of nmos output drivers during eos/esd stress |
| 05/29/2002 | EP1208422A1 Apparatus and method for programmable datapath arithmetic arrays |
| 05/29/2002 | DE10129852A1 Ausgangspufferschaltung Output buffer circuit |
| 05/29/2002 | DE10121500A1 Pegelumsetzungsschaltung und Halbleitereinrichtung Level conversion circuit and semiconductor device |
| 05/29/2002 | DE10053820A1 Elektronisches Sicherheitsschaltgerät Electronic safety relay |
| 05/29/2002 | CN1351421A Level shift circuit and semiconductor integrated circuits |
| 05/29/2002 | CN1351377A Voltage reverting circuits |
| 05/28/2002 | US6397345 Fault tolerant bus for clustered system |
| 05/28/2002 | US6397342 Device with a clock output circuit |
| 05/28/2002 | US6396761 Semiconductor integrated circuit device and method of activating the same |
| 05/28/2002 | US6396331 Mechanism for minimizing undesirable effects of parasitic components in integrated circuits |
| 05/28/2002 | US6396326 High voltage driver having overshoot/undershoot protection circuitry |
| 05/28/2002 | US6396316 Clock buffer with LC circuit for jitter reduction |
| 05/28/2002 | US6396315 Voltage clamp for a failsafe buffer |
| 05/28/2002 | US6396307 Semiconductor integrated circuit and method for designing the same |
| 05/28/2002 | US6396305 Digital leakage compensation circuit |
| 05/28/2002 | US6396304 Programmable logic array integrated circuits with blocks of logic regions grouped into super-blocks |
| 05/28/2002 | US6396303 Expandable interconnect structure for FPGAS |
| 05/28/2002 | US6396302 Configurable logic element with expander structures |
| 05/28/2002 | US6396301 Ground bounce prediction methodology and use of same in data error reduction |
| 05/28/2002 | US6396300 Circuit and method for contact pad isolation |
| 05/28/2002 | US6396168 Programmable logic arrays |
| 05/28/2002 | US6396098 Semiconductor memory device and method of fabricating the same |
| 05/23/2002 | WO2002041492A1 Magnetic logic elements |