| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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| 04/02/2002 | US6366134 CMOS dynamic logic circuitry using quantum mechanical tunneling structures |
| 04/02/2002 | US6366131 System and method for increasing a drive signal and decreasing a pin count |
| 04/02/2002 | US6366129 Method and apparatus for buffering an input-output node of an integrated circuit |
| 04/02/2002 | US6366128 Circuit for producing low-voltage differential signals |
| 04/02/2002 | US6366127 Digital CMOS voltage interface circuits |
| 04/02/2002 | US6366126 Input circuit, output circuit, and input/output circuit and signal transmission system using the same input/output circuit |
| 04/02/2002 | US6366124 BiDirectional active voltage translator with bootstrap switches for mixed-supply VLSI |
| 04/02/2002 | US6366122 Tristate driver for integrated circuit in interconnects |
| 04/02/2002 | US6366121 Programmable logic array integrated circuit architectures |
| 04/02/2002 | US6366120 Interconnection resources for programmable logic integrated circuit devices |
| 04/02/2002 | US6366119 Programmable logic device macrocell with improved logic capability |
| 04/02/2002 | US6366114 Output buffer with control circuitry |
| 03/28/2002 | WO2002025819A1 An apparatus for active high speed - low power analog voltage drive |
| 03/28/2002 | WO2002025818A2 A low jitter high speed cmos to cml clock converter |
| 03/28/2002 | WO2001039249B1 Universal hardware device and method and tools for use therewith |
| 03/28/2002 | US20020038414 Address generator for local system memory in reconfigurable logic chip |
| 03/28/2002 | US20020036942 Semiconductor integrated circuit device having a hierarchical power source configuration |
| 03/28/2002 | US20020036529 Semiconductor integrated circuit with reduced leakage current |
| 03/28/2002 | US20020036521 Semiconductor integrated circuit and semiconductor integrated circuit system |
| 03/28/2002 | US20020036516 Method and apparatus for electrically coupling digital devices |
| 03/27/2002 | EP1191696A2 Programmable logic devices with function-specific blocks |
| 03/27/2002 | EP1191695A2 MOS logic circuit and semiconductor apparatus including the same |
| 03/27/2002 | EP1191694A1 A logic level shifter with integrated latch |
| 03/27/2002 | EP1190541A1 Circuit and method for galvanically separate broadband transmission |
| 03/27/2002 | EP1190531A2 Pass-driver circuit for a two-conductor bus-system |
| 03/27/2002 | EP1190487A1 High voltage protection circuit on standard cmos process |
| 03/27/2002 | EP1190420A1 Method and apparatus for testing an impedance-controlled input/output (i/o) buffer in a highly efficient manner |
| 03/27/2002 | EP0976059B1 A field programmable processor |
| 03/26/2002 | US6363029 Semiconductor device incorporating internal power supply for compensating for deviation in operating condition and fabrication process conditions |
| 03/26/2002 | US6362942 Input stage protection circuit for a receiver |
| 03/26/2002 | US6362678 Circuit for reducing rise/fall times for high speed transistor logic |
| 03/26/2002 | US6362672 Apparatus and method for automatic matching of signaling rise time to fall time |
| 03/26/2002 | US6362667 Output driver circuit |
| 03/26/2002 | US6362666 Precision and fast recovery buffer |
| 03/26/2002 | US6362665 Backwards drivable MOS output driver |
| 03/26/2002 | US6362664 Active pull-up circuit |
| 03/26/2002 | US6362659 Domino logic family |
| 03/26/2002 | US6362656 Integrated circuit memory devices having programmable output driver circuits therein |
| 03/26/2002 | US6362655 Linear active resistor and driver circuit incorporating the same |
| 03/26/2002 | US6362653 High voltage tolerant receivers |
| 03/26/2002 | US6362652 High voltage buffer for submicron CMOS |
| 03/26/2002 | US6362650 Method and apparatus for incorporating a multiplier into an FPGA |
| 03/26/2002 | US6362649 Field programmable gate array with mask programmed input and output buffers |
| 03/26/2002 | US6362648 Multiplexer for implementing logic functions in a programmable logic device |
| 03/26/2002 | US6362647 Programmable function device and memory cell therefor |
| 03/26/2002 | US6362646 Method and apparatus for reducing memory resources in a programmable logic device |
| 03/26/2002 | US6362644 Programmable termination for integrated circuits |
| 03/26/2002 | US6362065 Blocking of boron diffusion through the emitter-emitter poly interface in PNP HBTs through use of a SiC layer at the top of the emitter epi layer |
| 03/26/2002 | CA2151373C Method and apparatus for transmitting nrz data signals across an isolation barrier disposed in an interface between adjacent devices on a bus |
| 03/21/2002 | WO2002023839A2 Active terminating device with optional line-receiving and line-driving capabilities |
| 03/21/2002 | WO2002023737A1 Demultiplexer apparatus and communication apparatus using the same |
| 03/21/2002 | WO2002023724A1 Repairable dynamic programmable logic array |
| 03/21/2002 | US20020035718 Semiconductor device trimming method, semiconductor device trimming apparatus, and method for creating semiconductor device trimming table |
| 03/21/2002 | US20020034103 Semiconductor device with impedance controllable output buffer |
| 03/21/2002 | US20020033730 Preset circuit and method for n-well bias of a CMOS circuit |
| 03/21/2002 | US20020033715 Receiving circuit |
| 03/21/2002 | US20020033713 CMOS buffer circuit |
| 03/21/2002 | US20020033712 Interface latch for data level transfer |
| 03/21/2002 | US20020033711 Pulse width distortion correction logic level converter |
| 03/21/2002 | US20020033644 Method and apparatus for driving capacitive element |
| 03/21/2002 | CA2727842A1 System and method for transmission-line termination by signal cancellation, and applications thereof |
| 03/20/2002 | EP1189399A2 Output buffer circuit |
| 03/20/2002 | EP1189284A1 Arrangement for improving ESD protection of a CMOS buffer |
| 03/20/2002 | EP1188241A1 SCALABLE ARCHITECTURE FOR HIGH DENSITY CPLD's HAVING TWO-LEVEL HIERARCHY OF ROUTING RESOURCES |
| 03/20/2002 | EP0846289B1 Field programmable gate array with distributed ram and increased cell utilization |
| 03/20/2002 | EP0839408B1 Circuit board insertion circuitry for high reliability backplanes |
| 03/20/2002 | CN1340918A Driving method for circuit |
| 03/19/2002 | US6360330 System and method for backing up data stored in multiple mirrors on a mass storage subsystem under control of a backup server |
| 03/19/2002 | US6359499 Temperature and process independent CMOS circuit |
| 03/19/2002 | US6359494 Semiconductor integrated circuit device having an oscillation circuit using reference current source independent from influence of variation of power supply voltage and threshold voltage of transistor |
| 03/19/2002 | US6359493 Level shift circuit |
| 03/19/2002 | US6359492 Arrangement for level conversion of high-frequency low-voltage signals |
| 03/19/2002 | US6359491 Voltage level shifter and poly-silicon display |
| 03/19/2002 | US6359490 Clamping circuit and interface circuit therefor |
| 03/19/2002 | US6359489 Clock signal generation and buffer circuit having high noise immunity and low power consumption |
| 03/19/2002 | US6359478 Reduced-undershoot CMOS output buffer with delayed VOL-driver transistor |
| 03/19/2002 | US6359477 Low power driver design |
| 03/19/2002 | US6359474 Input interface circuit |
| 03/19/2002 | US6359471 Mixed swing voltage repeaters for high resistance or high capacitance signal lines and methods therefor |
| 03/19/2002 | US6359470 Ultra low power voltage translation circuitry and its application in a TTL-to-CMOS buffer |
| 03/19/2002 | US6359469 Logic element for a programmable logic integrated circuit |
| 03/19/2002 | US6359468 Programmable logic device with carry look-ahead |
| 03/19/2002 | US6359465 CMOS small signal switchable adjustable impedence terminator network |
| 03/19/2002 | US6359464 Method of use with a terminator and network |
| 03/19/2002 | US6359463 Method and apparatus for reducing induced switching transients |
| 03/19/2002 | US6359462 Method and apparatus for reducing induced switching transients |
| 03/19/2002 | US6359315 Circuits for controlling a bidirectional terminal and systems using the same |
| 03/19/2002 | CA2271251C Method and apparatus for testing field programmable gate arrays |
| 03/14/2002 | WO2002021695A2 Depopulated programmable logic array |
| 03/14/2002 | WO2002021694A2 Tileable field-programmable gate array architecture |
| 03/14/2002 | WO2002021693A2 Field programmable gate array and microcontroller system-on-a-chip |
| 03/14/2002 | WO2002021684A2 Circuit for producing low-voltage differential signals |
| 03/14/2002 | US20020031028 Threshold voltage compensation circuits for low voltage and low power CMOS integrated circuits |
| 03/14/2002 | US20020030535 Dynamic bias circuitry utilizing early voltage clamp and translinear techniques |
| 03/14/2002 | US20020030533 Circuit including forward body bias from supply voltage and ground nodes |
| 03/14/2002 | US20020030528 Level shifter for use in active matrix display apparatus |
| 03/14/2002 | US20020030523 Slew rate control |
| 03/14/2002 | US20020030521 Semiconductor integrated circuit device and microcomputer |
| 03/14/2002 | US20020030517 Output buffer circuit |
| 03/14/2002 | US20020030513 Logic circuit cell constituting an integrated circuit and cell library having a collection of logic circuit cells |