| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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| 04/18/2002 | US20020044007 Semiconductor integrated circuit apparatus |
| 04/18/2002 | US20020043997 Charge compensation control circuit and method for use with output driver |
| 04/18/2002 | US20020043995 Fast locking phase frequency detector |
| 04/18/2002 | US20020043988 Customizable and programmable cell array |
| 04/18/2002 | US20020043971 Ringing preventive circuit, device under test board, pin electronics card, and semiconductor device |
| 04/18/2002 | US20020043671 Semiconductor integrated circuit having circuit for transmitting input signal |
| 04/18/2002 | US20020043670 Integrated circuit with circuit elements having different supply voltages |
| 04/17/2002 | EP1197825A2 Integrated circuit with parts supplied with a different supply voltage |
| 04/17/2002 | EP1196996A1 Electronic circuit, especially for a mobile radiotelephone device |
| 04/17/2002 | EP1196995A1 Tristate circuit for power up conditions |
| 04/17/2002 | EP1135859A4 Method and apparatus for logic synchronization |
| 04/17/2002 | EP0935849A4 Low-impedance cmos output stage and method |
| 04/17/2002 | EP0778999B1 High speed digital buffer, driver or level shifter circuit |
| 04/17/2002 | CN1345424A Manipulation proof integrated circuit |
| 04/17/2002 | CN1083195C Termination network and control circuit |
| 04/16/2002 | US6374393 Logic circuit evaluation using sensing latch logic |
| 04/16/2002 | US6374329 High-availability super server |
| 04/16/2002 | US6373782 Semiconductor device with reduced error operation caused by threshold voltage variation |
| 04/16/2002 | US6373779 Block RAM having multiple configurable write modes for use in a field programmable gate array |
| 04/16/2002 | US6373773 Semiconductor device with DRAM and logic part integrated |
| 04/16/2002 | US6373333 Vital “AND” gate apparatus and method |
| 04/16/2002 | US6373327 Voltage generating/transferring circuit |
| 04/16/2002 | US6373323 Semiconductor integrated circuit device with threshold control |
| 04/16/2002 | US6373321 CMOS semiconductor device |
| 04/16/2002 | US6373315 Signal potential conversion circuit |
| 04/16/2002 | US6373300 Integrated circuit with multi-function controlled impedance output drivers |
| 04/16/2002 | US6373297 Input buffer capable of achieving quick response |
| 04/16/2002 | US6373292 Low voltage differential logic |
| 04/16/2002 | US6373291 Pass transistor logic circuit for reducing power consumption |
| 04/16/2002 | US6373290 Clock-delayed pseudo-NMOS domino logic |
| 04/16/2002 | US6373288 Method of implementing clock trees in synchronous digital electronic circuits, and a programmable delay buffer stage therefor |
| 04/16/2002 | US6373287 Input/output control circuit and microcomputer |
| 04/16/2002 | US6373286 Integrated circuit with improved off chip drivers |
| 04/16/2002 | US6373285 Level shift circuit |
| 04/16/2002 | US6373284 Voltage level shifting circuit for bidirectional data |
| 04/16/2002 | US6373283 Level conversion circuit as well as semiconductor device and display unit comprising the same |
| 04/16/2002 | US6373282 Single gate oxide cascaded output buffer stage and method |
| 04/16/2002 | US6373280 Fast signal conductor networks for programmable logic devices |
| 04/16/2002 | US6373279 FPGA lookup table with dual ended writes for ram and shift register modes |
| 04/16/2002 | CA2240288C Energy economized pass-transistor logic circuit and full adder using the same |
| 04/11/2002 | WO2002029972A2 Buffers with reduced voltage input/output signals |
| 04/11/2002 | WO2002029893A1 Semiconductor device |
| 04/11/2002 | WO2002029600A2 Cell system with segmented intermediate cell structure |
| 04/11/2002 | WO2002029545A2 Asynchronously controlling data transfers within a circuit |
| 04/11/2002 | WO2002029422A2 A scan test system and method for manipulating logic values that remain constant during normal operations |
| 04/11/2002 | US20020041524 Semiconductor integrated circuit |
| 04/11/2002 | US20020041242 Semiconductor apparatus |
| 04/11/2002 | US20020041194 Semiconductor integrated circuit having output buffer |
| 04/11/2002 | US20020041192 Interconnection resources for programmable logic integrated circuit devices |
| 04/11/2002 | US20020041191 Programmable logic device with hierarchical interconnection resources |
| 04/11/2002 | US20020040984 I/O circuit of semiconductor integrated device |
| 04/10/2002 | EP1195902A2 Semiconductor integrated circuit with reduced leakage current |
| 04/10/2002 | CN1344436A Methods and appts. for bipolar elimination in silicon-on-insulator (sol) domino circuits |
| 04/10/2002 | CN1344079A 输出缓冲器电路 Output buffer circuit |
| 04/09/2002 | US6370658 Device for testing digital signal processor in digital video disc reproducing apparatus |
| 04/09/2002 | US6370140 Programmable interconnect matrix architecture for complex programmable logic device |
| 04/09/2002 | US6370066 Differential output circuit |
| 04/09/2002 | US6369624 Programmable phase shift circuitry |
| 04/09/2002 | US6369619 Voltage tolerant input/output circuit |
| 04/09/2002 | US6369617 Semiconductor integrated circuit and semiconductor logic circuit used in the integrated circuit |
| 04/09/2002 | US6369616 Low power clock buffer with shared, precharge transistor |
| 04/09/2002 | US6369613 Input/output drivers |
| 04/09/2002 | US6369612 High voltage level-shifter with tri-state output driver |
| 04/09/2002 | US6369611 Sequential circuit for high frequency clocking |
| 04/09/2002 | US6369610 Reconfigurable multiplier array |
| 04/09/2002 | US6369609 Degenerate network for PLD and plane |
| 04/09/2002 | US6369608 Conditioning semiconductor-on-insulator transistors for programmable logic devices |
| 04/09/2002 | US6369606 Mixed threshold voltage CMOS logic device and method of manufacture therefor |
| 04/09/2002 | US6369605 Self-terminated driver to prevent signal reflections of transmissions between electronic devices |
| 04/09/2002 | US6369604 Self-compensating output buffer |
| 04/04/2002 | WO2002027951A1 A method and an apparatus for improving the carriers' output power of a broadband multi-carrier base-station |
| 04/04/2002 | WO2002027941A2 Digital to analog converter. |
| 04/04/2002 | WO2002027935A1 Level-shifting circuitry having 'high' output impendance during disable mode |
| 04/04/2002 | WO2002027934A2 Level-shifting circuitry having 'high' output during disable mode |
| 04/04/2002 | WO2002027933A1 Push-pull end stage for digital signals with controlled output levels |
| 04/04/2002 | WO2002027932A2 Output buffer with charge-pumped noise cancellation |
| 04/04/2002 | WO2002027931A2 Method and apparatus for asynchronously controlling state information within a circuit |
| 04/04/2002 | WO2002027930A2 Dynamic swing voltage adjustment |
| 04/04/2002 | WO2002027929A2 Universal impedance control for wide range loaded signals |
| 04/04/2002 | WO2002027701A2 Display devices with draving integrated circuits arranged within the display area |
| 04/04/2002 | US20020040459 Semiconductor integrated circuit having a self-testing function |
| 04/04/2002 | US20020039042 Level shift circuit |
| 04/04/2002 | US20020039035 Logic circuit |
| 04/04/2002 | US20020039033 Distributing data to multiple destinations within an asynchronous circuit |
| 04/04/2002 | US20020038888 Semiconductor integrated circuit together with timepiece and electronic equipment provided with the same |
| 04/04/2002 | DE10101735C1 Switch stage acting as input buffer for dynamic random-access memory has difference stage coupled via level converter to memory element providing output signal |
| 04/03/2002 | EP1193873A2 Driver circuit for PC-bus |
| 04/03/2002 | EP1192551A1 Interface for coupling a bus node to the bus line of a bus system |
| 04/03/2002 | EP0940012B1 Lookup tables which double as shift registers |
| 04/03/2002 | EP0734573B1 Application specific modules in a programmable logic device |
| 04/02/2002 | US6367065 Method and apparatus for N-Nary logic circuit design tool with precharge circuit evaluation |
| 04/02/2002 | US6366867 Method and apparatus for providing controllable compensation factors to a compensated driver circuit which may be used to perform testing of the structural integrity of the compensated driver circuit |
| 04/02/2002 | US6366498 Nonvolatile configuration cells and cell arrays |
| 04/02/2002 | US6366224 Programmable voltage regulator |
| 04/02/2002 | US6366167 Low voltage rail-to-rail CMOS input stage |
| 04/02/2002 | US6366159 Dynamic bias circuitry utilizing early voltage clamp and translinear techniques |
| 04/02/2002 | US6366142 Buffer circuit having Schottky gate transistors adjusting amplitude of output signal |
| 04/02/2002 | US6366141 Semiconductor driver circuit utilizing substrate voltage control |
| 04/02/2002 | US6366140 High bandwidth clock buffer |
| 04/02/2002 | US6366139 Method for an output driver with improved impedance control |