Patents
Sitemap › H03 - Basic electronic circuitry › H03K - Pulse technique › H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
05/2003
05/27/2003US6570401 Dual rail power supply sequence tolerant off-chip driver
05/22/2003WO2003043293A1 System and method for reducing power dissipation for dsl circuits
05/22/2003WO2003043192A1 Method for preventing transients during switching processes in integrated switching circuits, and an integrated switching circuit
05/22/2003WO2003043191A2 Lvds driver for small supply voltages
05/22/2003WO2003032490A3 Method and apparatus for an asynchronous pulse logic circuit
05/22/2003WO2002056473A3 Sub-micron high input voltage tolerant input output (i/o) circuit
05/22/2003US20030097628 Error detection on programmable logic resources
05/22/2003US20030097616 Systems and methods for monitoring an application processor
05/22/2003US20030095556 Transition signal control unit and DMA controller and transition signal control processor using transition signal control unit
05/22/2003US20030095061 A/d converter with high-speed input circuit
05/22/2003US20030095004 Differential amplifier circuit
05/22/2003US20030094993 Analog switch circuit
05/22/2003US20030094991 Apparatus and method of use a single reference component in a master-slave configuration for multiple circuit compensation
05/22/2003US20030094990 Self-compensation circuit for terminal resistors
05/22/2003US20030094988 Voltage generating circuit, level shift circuit and semiconductor device
05/22/2003US20030094987 Method and apparatus for dynamically controlling the performance of buffers under different performance conditions
05/22/2003US20030094985 Data output method and data output circuit for applying reduced precharge level
05/22/2003US20030094980 Sub-Micron high input voltage tolerant input output (I/O) circuit
05/22/2003US20030094973 Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges and systems including same
05/22/2003US20030094972 Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges
05/22/2003US20030094971 Voltage translator
05/22/2003US20030094970 Transceiver driver with programmable edge rate control independent of fabrication process, supply voltage, and temperature
05/22/2003US20030094969 Semiconductor device
05/22/2003US20030094661 Multi-threshold MIS integrated circuit device and circuit design method thereof
05/21/2003EP1312166A2 Voltage stabilized low level driver
05/21/2003EP1057263B1 High speed pin driver integrated circuit architecture for commercial automatic test equipment applications
05/21/2003EP0675599B1 Semiconductor integrated circuit
05/21/2003CN1419274A 半导体电路装置及半导体装置 The semiconductor circuit device and semiconductor device
05/21/2003CN1109406C Energy-saved pass-transistor logic circuit and full adder using same
05/21/2003CN1109405C Output buffer circuit having low breakdown voltage
05/21/2003CN1109404C Computational circuit
05/21/2003CN1109403C 逻辑电路 Logic
05/20/2003US6567969 Configurable logic array including lookup table means for generating functions of different numbers of input terms
05/20/2003US6567968 Block level routing architecture in a field programmable gate array
05/20/2003US6567290 High-speed low-power semiconductor memory architecture
05/20/2003US6567067 Level shifter
05/20/2003US6566938 System for a constant current source
05/20/2003US6566932 On-chip system with voltage level converting device for preventing leakage current due to voltage level difference
05/20/2003US6566911 Multiple-mode CMOS I/O cell
05/20/2003US6566910 Low power dual trip point input buffer circuit
05/20/2003US6566909 Integrated circuit device including CMOS tri-state drivers suitable for powerdown
05/20/2003US6566908 Pulse width distortion correction logic level converter
05/20/2003US6566907 Unclocked digital sequencer circuit with flexibly ordered output signal edges
05/20/2003US6566906 Specialized programmable logic region with low-power mode
05/20/2003US6566904 Pad calibration circuit with on-chip resistor
05/20/2003US6566903 Method and apparatus for dynamically controlling the performance of buffers under different performance conditions
05/15/2003WO2003041275A1 Unlocked digital sequencer circuit with flexibly ordered output signal edges
05/15/2003WO2003010550A3 Integrated testing of serializer/deserializer in fpga
05/15/2003WO2002029600A3 Cell system with segmented intermediate cell structure
05/15/2003US20030093724 Electronic apparatus test circuit
05/15/2003US20030093720 Analytical server, program analysis network system, and program analysis method
05/15/2003US20030090310 Reducing I/O supply noise with digital control
05/15/2003US20030090301 Semiconductor circuit and semiconductor device
05/15/2003US20030090293 I/O buffer with variable conductivity
05/15/2003US20030090292 Semiconductor circuit device having active and standby states
05/15/2003DE20303541U1 Loading of data in multiple programmable devices uses devices coupled in parallel
05/14/2003EP1310881A2 Unit for processing numeric and logical operations, for use in processors (cpus) and in multicomputer systems
05/14/2003EP0848868B1 Resonant driver circuit with reduced power consumption
05/14/2003EP0835554B1 A fast swing-limited pullup circuit
05/14/2003CN1417969A Semicoductor device
05/13/2003US6563744 Semiconductor memory device
05/13/2003US6563362 Voltage translator circuit
05/13/2003US6563360 System for controlling electrical signal level
05/13/2003US6563352 Driver circuit employing high-speed tri-state for automatic test equipment
05/13/2003US6563351 Semiconductor integrated circuit having output buffer
05/13/2003US6563345 Monotonic dynamic static pseudo-NMOS logic circuits
05/13/2003US6563344 Buffer circuit for the reception of a clock signal
05/13/2003US6563343 Circuitry for a low internal voltage
05/13/2003US6563342 CMOS ECL output buffer
05/13/2003US6563341 Tri-state buffer circuit
05/13/2003US6563338 Control circuit and chipset on motherboard for saving terminal resistors and method for realizing the same
05/13/2003US6563337 Driver impedance control mechanism
05/08/2003WO2003039001A1 Programmable interface for field programmable gate array cores
05/08/2003WO2003038644A2 Digital logic unit that can be reconfigured
05/08/2003US20030088836 Low power test circuit and a semiconductor integrated circuit with the low power test circuit
05/08/2003US20030088757 Efficient high performance data operation element for use in a reconfigurable logic environment
05/08/2003US20030085745 PMOS/NMOS circuits
05/08/2003US20030085737 Innovative high speed LVDS driver circuit
05/08/2003US20030085736 Interchangeable CML/LVDS data transmission circuit
05/08/2003US20030085735 High impedance circuit with acknowledge
05/08/2003US20030085734 Unclocked digital sequencer circuit with flexibly ordered output signal edges
05/08/2003US20030085718 Switching device provided with polarity-inverting means
05/07/2003EP1309088A1 Switching device equipped with polarity inversion means
05/07/2003EP1308850A2 Computer bus configuration and input/output buffer
05/07/2003EP1308849A2 Bus configuration and input/output buffer
05/07/2003EP1308848A2 Computer bus configuration and input/output buffer
05/07/2003EP1308847A2 Computer bus configuration and input/output buffer
05/07/2003EP1308734A2 Electric circuit
05/07/2003EP1307966A1 Secure programmable logic device
05/07/2003EP1307965A1 Fast switching input buffer
05/07/2003CN1416219A Direct current level converter
05/07/2003CN1416138A 半导体装置 Semiconductor device
05/07/2003CN1416134A 半导体装置 Semiconductor device
05/07/2003CN1416132A 半导体装置 Semiconductor device
05/06/2003US6560661 Data receiver that performs synchronous data transfer with reference to memory module
05/06/2003US6559708 Virtual and backgate supply line circuit
05/06/2003US6559704 Inverting level shifter with start-up circuit
05/06/2003US6559700 Semiconductor integrated circuit
05/06/2003US6559691 Voltage level converting circuit
05/06/2003US6559690 Programmable dual drive strength output buffer with a shared boot circuit
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