Patents
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
02/2003
02/27/2003WO2003017085A2 Power raising circuit
02/27/2003WO2002095531A3 Circuit having a controllable slew rate
02/27/2003WO2002046936A3 Method and apparatus for communicating with a host
02/27/2003WO2002021684A3 Circuit for producing low-voltage differential signals
02/27/2003WO2001069837A9 Clock data recovery circuitry associated with programmable logic device circuitry
02/27/2003US20030039262 Hierarchical mux based integrated circuit interconnect architecture for scalability and automatic generation
02/27/2003US20030039151 Memory device and memory system
02/27/2003US20030039141 Data holding circuit having backup function
02/27/2003US20030038681 System and method of digital tuning a voltage controlled oscillator
02/27/2003US20030038668 Low power operation mechanism and method
02/27/2003US20030038658 High voltage tolerant differential input receiver
02/27/2003US20030038654 Registered logic macrocell with product term allocation and adjacent product term stealing
02/27/2003US20030038653 Semiconductor integrated circuit device including logic gate that attains reduction of power consumption and high-speed operation
02/27/2003CA2457201A1 Power raising circuit
02/26/2003EP1286470A2 Input/output interface and semiconductor integrated circuit having input/output interface
02/26/2003EP1286469A1 An output driver for integrated circuits and a method for controlling the output impedance of an integrated circuit
02/26/2003EP1285497A1 Vital "and" gate apparatus and method
02/26/2003EP1141962B1 Seu hardening circuit
02/26/2003EP1086531B1 Logic gate
02/26/2003CN2538101Y Signal connector for expansion storage device movable state
02/26/2003CN1399724A Reconfigurable integrated circuit with integrated debugging facilities for use in emulation system
02/26/2003CN1399408A Chip with even output buffer circuit stages and its design method
02/26/2003CN1399407A Bootstrap-complementary transmission gate charge-restoring low-power consumption circuit structure
02/26/2003CN1399406A Threephase half-track differential logic gate circuit
02/26/2003CN1399405A 半导体装置 Semiconductor device
02/26/2003CN1399326A Double-swing charge-restoring low-power consumption circuit structure
02/26/2003CN1102259C Semiconductor device, operating device, signal converter, and signal processing system
02/25/2003US6526559 Method for creating circuit redundancy in programmable logic devices
02/25/2003US6526558 Methods for configuring FPGA's having variable grain blocks and shared logic for providing symmetric routing of result output to differently-directed and tristateable interconnect resources
02/25/2003US6526557 Architecture and method for partially reconfiguring an FPGA
02/25/2003US6526520 Method of self-synchronization of configurable elements of a programmable unit
02/25/2003US6525984 Semiconductor integrated circuit device having hierarchical power source arrangement
02/25/2003US6525597 Circuit configuration with internal supply voltage
02/25/2003US6525595 Booster, IC card having the same, and electronic equipment having the same
02/25/2003US6525581 Duty correction circuit and a method of correcting a duty
02/25/2003US6525576 Output circuit, input circuit and input/output circuit
02/25/2003US6525575 Output buffer circuit
02/25/2003US6525571 Current-controlled CMOS circuits with inductive broadbanding
02/25/2003US6525570 Input/output interfacing circuit, input/output interface, and semiconductor device having input/output interfacing circuit
02/25/2003US6525565 Double data rate flip-flop
02/25/2003US6525564 Interconnection resources for programmable logic integrated circuit devices
02/25/2003US6525562 Programmable logic device capable of preserving state data during partial or complete reconfiguration
02/25/2003US6525561 Very fine grain field programmable gate array architecture and circuitry
02/25/2003US6525560 Method and structure for shipping a die as multiple products
02/25/2003US6525559 Fail-safe circuit with low input impedance using active-transistor differential-line terminators
02/25/2003US6525558 Programmable impedance control circuit
02/25/2003US6525336 Superfine electronic device and method for making same
02/20/2003WO2003014959A2 Universal computer architecture
02/20/2003WO2002101926A3 Integrated circuit and method for testing the integrated circuit
02/20/2003US20030034830 Low leakage sleep mode for dynamic circuits
02/20/2003US20030034822 Local supply generator for a digital cmos integrated circuit having an analog signal processing circuitry
02/20/2003US20030034817 Apparatus for reducing a magnitude of a rate of current change of an integrated circuit
02/20/2003US20030034812 Power on reset circuit
02/20/2003US20030034807 Output driver devices
02/20/2003US20030034806 Semiconductor device and display device
02/20/2003US20030034802 Quad state logic design methods, circuits, and systems
02/20/2003US20030034801 Charge recovery for dynamic circuits
02/20/2003US20030034800 Cold clock power reduction
02/20/2003US20030034799 Programmable drive circuit for I/O port
02/20/2003US20030034798 Data processing system with improved latency and associated methods
02/20/2003US20030034797 Multi-access fifo queue
02/20/2003US20030034794 Integrated circuit of superconducting circuit blocks and method of designing the same
02/20/2003US20030034549 Semiconductor integrated circuit device
02/19/2003CN1398046A 半导体集成电路 The semiconductor integrated circuit
02/19/2003CN1101991C Arithmetic processing appts. and arithmetic processing circuit
02/19/2003CN1101990C Alternately sampling dual-tone complex frequency generating method and arrangement
02/18/2003US6522512 Anti-latch-up circuit
02/18/2003US6522323 Level shift circuit and image display device
02/18/2003US6522191 Synchronized voltage generator for amplifying voltage inputs
02/18/2003US6522180 Bi-voltage levels switches
02/18/2003US6522174 Differential cascode current mode driver
02/18/2003US6522171 Method of reducing sub-threshold leakage in circuits during standby mode
02/18/2003US6522170 Self-timed CMOS static logic circuit
02/18/2003US6522168 Interface latch for data level transfer
02/18/2003US6522165 Bus termination scheme for flexible uni-processor and dual processor platforms
02/18/2003US6522083 Driver circuitry with tuned output impedance
02/13/2003WO2002023839A3 Active terminating device with optional line-receiving and line-driving capabilities
02/13/2003US20030033544 Secure system unit mobility
02/13/2003US20030033463 Computer system storage
02/13/2003US20030033460 Computer system management
02/13/2003US20030033459 Interface standard support in modular computer systems
02/13/2003US20030033409 Secure network indentity allocation
02/13/2003US20030033399 Interfacing computer system modules
02/13/2003US20030033366 System management
02/13/2003US20030033365 Low cost computer system module interface
02/13/2003US20030033364 Interfacing computer modules
02/13/2003US20030033363 Extended computing system
02/13/2003US20030033362 Console connection
02/13/2003US20030033361 Computer system console access
02/13/2003US20030033360 Computer support module
02/13/2003US20030033348 Password management
02/13/2003US20030033107 Method and apparatus for independent output driver calibration
02/13/2003US20030032335 Computer connections
02/13/2003US20030031194 Priority delay insertion circuit
02/13/2003US20030031187 External storage for modular computer systems
02/13/2003US20030030993 Module ejection mechanism
02/13/2003US20030030991 Support module ejection mechanism
02/13/2003US20030030990 Secure network identity distribution
02/13/2003US20030030989 Computer module housing
02/13/2003US20030030988 Computer systems