Patents
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
02/2003
02/13/2003US20030030978 Cooling computer systems
02/13/2003US20030030977 Cooling power supplies
02/13/2003US20030030976 Cooling flow
02/13/2003US20030030975 Computer system cooling
02/13/2003US20030030579 Impedance control circuit
02/13/2003US20030030484 Low-power high-performance integrated circuit and related methods
02/13/2003US20030030483 Semiconductor device
02/13/2003US20030030482 Semiconductor integrated circuit and reference voltage generating circuit employing it
02/13/2003US20030030477 Semiconductor integrated circuit
02/13/2003US20030030476 Current saving mode for input buffers
02/13/2003US20030030467 Partial swing low power CMOS logic circuits
02/13/2003US20030030466 Domino logic with output predischarge
02/13/2003US20030030418 Regulator system for controlling output voltage and method of controlling the same
02/13/2003US20030030109 Semiconductor device
02/13/2003US20030030081 Semiconductor device
02/12/2003CN1396580A 驱动电路和液晶显示装置 Driving circuit and liquid crystal display device
02/12/2003CN1396579A 驱动电路 Drive circuit
02/11/2003US6519753 Programmable device with an embedded portion for receiving a standard circuit design
02/11/2003US6519704 System and method for driving a signal to an unbuffered integrated circuit
02/11/2003US6518837 Push-pull amplifier
02/11/2003US6518826 Method and apparatus for dynamic leakage control
02/11/2003US6518819 Push-pull output stage for digital signals with regulated output levels
02/11/2003US6518818 High voltage CMOS output driver in low voltage process
02/11/2003US6518816 Voltage translator, particularly of the CMOS type
02/11/2003US6518808 Slew rate adjusting circuit and semiconductor device
02/11/2003US6518804 Semiconductor integrated circuit device
02/11/2003US6518797 Current mode logic circuit with output common mode voltage and impedance control
02/11/2003US6518796 Dynamic CMOS circuits with individually adjustable noise immunity
02/11/2003US6518795 Design simplicity of very high-speed semiconductor device
02/11/2003US6518794 AC drive cross point adjust method and apparatus
02/11/2003US6518790 Semiconductor integrated circuit having circuit for transmitting input signal
02/11/2003US6518789 Circuit configuration for converting logic levels
02/11/2003US6518787 Input/output architecture for efficient configuration of programmable input/output cells
02/11/2003US6518786 Combinational logic using asynchronous single-flux quantum gates
02/11/2003US6518673 Capacitor for signal propagation across ground plane boundaries in superconductor integrated circuits
02/06/2003WO2003010891A2 Output driver equipped with a sensing resistor for measuring the current in the output driver
02/06/2003WO2003010785A2 Superconductive crossbar switch
02/06/2003WO2003010642A2 Method and apparatus for controlling signal states and leakage current during a sleep mode
02/06/2003WO2003010631A2 Hierarchical multiplexer-based integrated circuit interconnect architecture for scalability and automatic generation
02/06/2003WO2003010550A2 Integrated testing of serializer/deserializer in fpga
02/06/2003WO2002037783A3 Auto-mdix line-driver with power down loopback protection
02/06/2003WO2002009287A3 Architecture and method for partially reconfiguring an fpga
02/06/2003US20030026373 Noise-resistive, burst-mode receiving apparatus and a method for recovering a clock signal and data therefrom
02/06/2003US20030025552 Semiconductor integrated circuit
02/06/2003US20030025542 Slew rate control of output drivers using fets with different threshold voltages
02/06/2003US20030025541 Slew rate control of output drivers using PVT controlled edge rates and delays
02/06/2003US20030025535 Output drivers for IC
02/06/2003US20030025529 Conditional clock gate that reduces data dependent loading on a clock network
02/06/2003US20030025528 Universal pecl/lvds output structure
02/06/2003US20030025527 Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges and methods, circuits and systems including same
02/06/2003US20030025525 Tri-state driver arrangement
02/06/2003US20030025523 Active noise-canceling scheme for dynamic circuits
02/06/2003US20030025132 Inputs and outputs for embedded field programmable gate array cores in application specific integrated circuits
02/06/2003US20030025130 Suppressing the leakage current in an integrated circuit
02/06/2003CA2454688A1 Hierarchical multiplexer-based integrated circuit interconnect architecture for scalability and automatic generation
02/05/2003EP1282233A1 Programmable preemphasis for a differential SCSI bus driver
02/05/2003EP1119858B1 Decoder element for producing an output signal with three different potentials and operating method for said decoder element
02/05/2003CN1101083C Arrangement and method relating to digital information
02/05/2003CN1101082C Architecture and interconnect scheme for programmable logic circuits
02/05/2003CN1101081C Input circuit of semiconductor memory device
02/04/2003US6516365 Apparatus and method for topography dependent signaling
02/04/2003US6515534 Enhanced conductivity body biased PMOS driver
02/04/2003US6515532 Level shift circuit for shifting voltage levels
02/04/2003US6515527 Method for smoothing dI/dT noise due to clock transitions
02/04/2003US6515521 Semiconductor integrated circuit for low power and high speed operation
02/04/2003US6515516 System and method for improving signal propagation
02/04/2003US6515514 Method and circuit configuration for controlling a data driver
02/04/2003US6515513 Reducing leakage currents in integrated circuits
02/04/2003US6515512 Capacitively coupled re-referencing circuit with transient correction
02/04/2003US6515509 Programmable logic device structures in standard cell devices
02/04/2003US6515508 Differential interconnection circuits in programmable logic devices
02/04/2003US6515506 Circuit for reducing pin count of a semiconductor chip and method for configuring the chip
02/04/2003US6515505 Functionality change by bond optioning decoding
02/04/2003US6515504 Circuits and method for implementing autonomous sequential logic
02/04/2003US6515503 CMOS apparatus for driving transmission lines
02/04/2003US6515461 Voltage downconverter circuit capable of reducing current consumption while keeping response rate
01/2003
01/30/2003WO2003009495A1 System and method for individualized broadcasts on a general use broadcast frequency
01/30/2003WO2003009475A2 Line driver
01/30/2003WO2002058241A3 Method for conditioning semiconductor-on-insulator transsistors in programmable logic devices
01/30/2003WO2002025818A3 A low jitter high speed cmos to cml clock converter
01/30/2003US20030023945 Metal interconnection read only memory cell
01/30/2003US20030023912 Integrated testing of serializer/deserializer in FPGA
01/30/2003US20030020532 System for a constant current source
01/30/2003US20030020520 Semiconductor device
01/30/2003US20030020516 Voltage comparator circuit and substrate bias adjusting circuit using same
01/30/2003US20030020513 Interface circuit
01/30/2003US20030020095 Semiconductor integrated circuit with voltage down converter adaptable for burn-in testing
01/30/2003CA2454117A1 System and method for individualized broadcasts on a general use broadcast frequency
01/29/2003EP1280276A2 Device and method for transistor switching
01/29/2003EP1279228A2 Fpga lookup table with dual ended writes for ram and shift register modes
01/29/2003EP1279211A2 Topology-based reasoning apparatus for root-cause analysis of network faults
01/29/2003CN1393995A 半导体集成电路 The semiconductor integrated circuit
01/29/2003CN1100324C Semiconductor storage device with improved stage power source line structure
01/28/2003US6513080 High speed bus system and method for using voltage and timing oscillating references for signal detection
01/28/2003US6512407 Method and apparatus for level shifting approach with symmetrical resulting waveform
01/28/2003US6512401 Output buffer for high and low voltage bus
01/28/2003US6512395 Configurable memory for programmable logic circuits
01/28/2003US6512394 Technique for efficient logic power gating with data retention in integrated circuit devices
01/23/2003WO2003007477A1 Level converter circuit
01/23/2003WO2001091296A3 Block ram having multiple configurable write modes for use in a field programmable gate array