Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
09/2003
09/30/2003US6627517 Semiconductor package with improved thermal cycling performance, and method of forming same
09/30/2003US6627515 Method of fabricating a non-floating body device with enhanced performance
09/30/2003US6627512 Method of manufacturing a semiconductor device
09/30/2003US6627510 Method of making self-aligned shallow trench isolation
09/30/2003US6627505 Method of producing SOI MOSFET having threshold voltage of central and edge regions in opposite directions
09/30/2003US6627504 Stacked double sidewall spacer oxide over nitride
09/30/2003US6627503 Method of forming a multilayer dielectric stack
09/30/2003US6627502 Method for forming high concentration shallow junctions for short channel MOSFETs
09/30/2003US6627499 Semiconductor device and method of manufacturing the same
09/30/2003US6627498 Memory cell fabrication method and memory cell configuration
09/30/2003US6627497 Semiconductor integrated circuit device and method of manufacturing the same
09/30/2003US6627494 Method for forming gate electrode of flash memory
09/30/2003US6627491 Method of manufacturing non volatile memory device having two charge storage regions
09/30/2003US6627489 Method of producing CMOS transistors and related devices
09/30/2003US6627487 Semiconductor device and manufacturing method thereof
09/30/2003US6627485 Electro-optical device, method for fabricating the same, and electronic apparatus
09/30/2003US6627473 Compound semiconductor device with delta doped layer under etching stopper layer for decreasing resistance between active layer and ohmic electrode and process of fabrication thereof
09/30/2003US6627471 Method of manufacturing an array substrate having drive integrated circuits
09/30/2003US6627470 Array substrate for use in LCD device and method of fabricating same
09/30/2003US6626044 Freeze resistant sensor
09/30/2003US6626039 Electrically decoupled silicon gyroscope
09/26/2003CA2413666A1 Charge-giving body, and pattern-formed body using the same
09/25/2003WO2003079463A2 Programmable structure, an array including the structure, and methods of forming the same
09/25/2003WO2003079456A1 Method for producing substrate material and semiconductor device including plasma processing
09/25/2003WO2003079455A1 Lateral junctiion field-effect transistor and its manufacturing method
09/25/2003WO2003079454A1 Detector arrangement, method for the detection of electrical charge carriers and use of an ono field effect transistor of r detection of an electrical charge
09/25/2003WO2003079453A1 Trench dmos transistor having improved trench structure
09/25/2003WO2003079452A1 Three dimensional integrated circuits using sub-micron thin-film diodes
09/25/2003WO2003079451A1 Gate dielectric and method therefor
09/25/2003WO2003079445A1 Complementary schottky junction transistors and methods of forming the same
09/25/2003WO2003079444A1 Semiconductor device and its manufacturing method
09/25/2003WO2003079442A1 Active matrix electroluminescent display devices, and their manufacture
09/25/2003WO2003079441A1 Active matrix display devices, and their manufacture
09/25/2003WO2003079440A1 Active matrix electroluminescent display devices, and their manufacture
09/25/2003WO2003079425A1 Methods used in fabricating gates in integrated circuit device structures
09/25/2003WO2003079424A1 Method for fabricating a semiconductor device having different metal silicide portions
09/25/2003WO2003079423A1 Thermally induced reflectivity switch for laser thermal processing
09/25/2003WO2003079413A2 High k dielectric film and method for making
09/25/2003WO2003079410A2 Supporting control gate connection on a package using additional bumps
09/25/2003WO2003079407A2 Wafer-level coated copper stud bumps
09/25/2003WO2003079405A2 Method for forming thin film layers by simultaneous doping and sintering
09/25/2003WO2003079400A2 Electronic device, method, monomer and polymer
09/25/2003WO2003079365A1 Data storage circuit, data write method in the data storage circuit, and data storage device
09/25/2003WO2003078301A2 Micro-electromechanical systems
09/25/2003WO2003049176A3 Method for defining a source and a drain and a gap inbetween
09/25/2003WO2003044853A3 Substrate contact in soi and method therefor
09/25/2003WO2003036699A3 Lateral semiconductor-on-insulator structure and corresponding manufacturing methods
09/25/2003WO2003025984A3 Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same
09/25/2003WO2003023877A3 Surface modifying layers for organic thin film transistors
09/25/2003WO2003005416A3 Trench structure for semiconductor devices
09/25/2003WO2002097895A3 Transistor, method for producing an integrated circuit and method for producing a metal silicide layer
09/25/2003WO2002065508A3 Dopant precursors and processes
09/25/2003US20030181068 Methods for forming thin film layers by simultaneous doping and sintering
09/25/2003US20030181053 Method of manufacturing a nonvolatile memory cell with triple spacers and the structure thereof
09/25/2003US20030181043 Semiconductor device, manufacturing method thereof, and electric device using the semiconductor device or the manufacturing method
09/25/2003US20030181039 Improved reliability of outer lead bonding (OLB) parts of the semiconductor device; low-elasticity resin layer has a lower elasticity modulus than the resin mold
09/25/2003US20030181036 Compound structure for reduced contact resistance
09/25/2003US20030181028 Integrated circuit device and method therefor
09/25/2003US20030181027 Method of forming a polysilicon layer
09/25/2003US20030181024 Method for obtaining high quality InGaAsN semiconductor devices
09/25/2003US20030181015 Method of producing semiconductor device
09/25/2003US20030181014 Method of manufacturing semiconductor device with STI
09/25/2003US20030181012 Method of making an ultrathin silicon dioxide gate with improved dielectric properties using NH3 nitridation and post-deposition rapid thermal annealing
09/25/2003US20030181011 Fabrication process of a trench gate power MOS transistor with scaled channel
09/25/2003US20030181010 Power semiconductor device having a voltage sustaining region that includes doped columns formed with a single ion implantation step
09/25/2003US20030181009 Method of manufacturing semiconductor device
09/25/2003US20030181005 Semiconductor device and a method of manufacturing the same
09/25/2003US20030181002 Flat panel device
09/25/2003US20030181000 Method for fabricating nonvolatile memory device and method for fabricating semiconductor device
09/25/2003US20030180996 Semiconductor device and manufacturing method thereof
09/25/2003US20030180994 Dual work function CMOS gate technology based on metal interdiffusion
09/25/2003US20030180992 Laser beam irradiation method and method of manufacturing a thin film transistor
09/25/2003US20030180991 Method of fabricating polysilicon thin film transistor
09/25/2003US20030180990 Method of fabricating polysilicon thin film transistor
09/25/2003US20030180989 Method for making nanoscale wires and gaps for switches and transistors
09/25/2003US20030180981 Thin-film structure and method for manufacturing the same, and acceleration sensor and method for manufacturing the same
09/25/2003US20030180979 Electrooptical substrate device and manufacturing method for same, electrooptical apparatus, electronic apparatus and manufacturing method for a substrate device
09/25/2003US20030180975 Electrooptic device, electronic apparatus, and method for making the electrooptic device
09/25/2003US20030180969 Thin film polycrystalline memory structure
09/25/2003US20030179621 Nonvolatile semiconductor memory device
09/25/2003US20030179521 Electronic microcomponent incorporating a capacitive structure and fabrication process
09/25/2003US20030179325 Liquid crystal displays using organic insulating material for a gate insulating layer and/or having photolithographic formed spacers
09/25/2003US20030179323 Light sensitive display
09/25/2003US20030178723 Semiconductor device and method of manufacturing the same
09/25/2003US20030178704 P-n junction structure
09/25/2003US20030178703 Patterning semiconductor layers using phase shifting and assist features
09/25/2003US20030178701 Devices with patterned wells and method for forming same
09/25/2003US20030178700 Silicon bipolar transistor, circuit arrangement and method for production of a silicon bipolar transistor
09/25/2003US20030178698 Device including a resistive path to introduce an equivalent RC circuit
09/25/2003US20030178692 Reduced terminal testing system
09/25/2003US20030178690 Titanium boride gate electrode and interconnect
09/25/2003US20030178688 Stacked spacer structure and process
09/25/2003US20030178685 Arsenic dopes; controlling concentration; creep resistance
09/25/2003US20030178682 Semiconductor device and method of manufacturing the semiconductor device
09/25/2003US20030178681 Strained fin FETs structure and method
09/25/2003US20030178680 Silicon-on-insulator structure and method of reducing backside drain-induced barrier lowering
09/25/2003US20030178679 Semiconductor device and method of manufacturing the same
09/25/2003US20030178678 Doping methods for fully-depleted soi structures, and device comprising the resulting doped regions
09/25/2003US20030178677 Dielectric overcoating silicone substrate; positioning barrier; strain layer at interface
09/25/2003US20030178676 Transistor configuration with a shielding electrode outside an active cell array and a reduced gate-drain capacitance
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