Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/1991
05/14/1991US5016069 Large-scale EPROM memory
05/14/1991US5016065 Stress-free, defect-free
05/14/1991US5015884 Multiple array high performance programmable logic device family
05/14/1991US5015876 High speed charge-coupled sampler and rate reduction circuit
05/14/1991US5015874 Status holding circuit and logic circuit using the same
05/14/1991US5015866 Stage apparatus in exposing apparatus
05/14/1991US5015675 Encapsulation method, microelectronic devices made therefrom, and heat curable compositions based on epoxy resins, diaryliodonium hexafluroantimonate salts and free radical generators
05/14/1991US5015602 Method of manufacturing a semiconductor device having a planarized construction
05/14/1991US5015601 Method of manufacturing a nonvolatile semiconductor device
05/14/1991US5015600 Method for making integrated circuits
05/14/1991US5015599 Method of manufacturing a device comprising MIS transistors having a projecting gate on the weakly doped parts of source and drain regions
05/14/1991US5015598 Metal-insulator-smiconductor
05/14/1991US5015597 Process for the production of an inverted structure, active matrix display screen
05/14/1991US5015596 Semiconductors
05/14/1991US5015595 Method of making a high performance MOS device having both P- and N-LDD regions using single photoresist mask
05/14/1991US5015594 Process of making BiCMOS devices having closely spaced device regions
05/14/1991US5015593 Method of manufacturing semiconductor device
05/14/1991US5015559 Process for forming a fine resist pattern
05/14/1991US5015538 Multilayer polymer metal composite formed by electrodeposition
05/14/1991US5015503 Apparatus for producing compound semiconductor thin films
05/14/1991US5015425 Manufacturing apparatus
05/14/1991US5015337 Vapor recovery system
05/14/1991US5015331 Method of plasma etching with parallel plate reactor having a grid
05/14/1991US5015327 Method for producing semiconductive single crystal
05/14/1991US5015207 Multi-path feed-thru lead and method for formation thereof
05/14/1991US5015177 Wafer handling apparatus
05/14/1991US5014737 Quartz integrated trough/sump recirculating filtered high-purity chemical bath
05/14/1991US5014727 Bubbler device for washing semiconductor materials
05/14/1991US5014646 Method and apparatus for writing oxide film
05/14/1991US5014419 Twisted wire jumper electrical interconnector and method of making
05/14/1991US5014413 Method and apparatus for facilitating loading of a panel processing machine and positioning of artwork on a work surface thereon
05/14/1991CA1284237C Electron-beam exposure apparatus
05/14/1991CA1284236C Semiconductor device with low defect density oxide
05/14/1991CA1284235C Folded extended window field effect transistor
05/14/1991CA1284234C Apparatus including resonant-tunneling device having multiple-peak current-voltage characteristics
05/14/1991CA1284232C Low dose emitter vertical fuse
05/10/1991CA2029624A1 Aqueous processible photopolymerizable compositions capable of photolytically
05/08/1991EP0426609A2 Ceramic insulating substrate and process for producing the same
05/08/1991EP0426600A2 Formation of high quality patterns for substrates and apparatus therefor
05/08/1991EP0426533A1 Tape carrier having connection function and method of fabricating the same
05/08/1991EP0426496A2 Planarizing surfaces of interconnect substrates by diamond turning
05/08/1991EP0426494A1 Vapor deposition apparatus
05/08/1991EP0426493A2 Dry etching apparatus
05/08/1991EP0426380A2 Non-alloyed ohmic contact to III-V semiconductors-on-silicon
05/08/1991EP0426305A1 Method for etching windows having different depths
05/08/1991EP0426303A2 A soldering method
05/08/1991EP0426284A1 RF transistor package with nickel oxide barrier
05/08/1991EP0426252A2 A semiconductor device and method of manufacturing a semiconductor device
05/08/1991EP0426251A1 Process for manufacturing a device having MIS transistors with an inverted T-shaped gate electrode
05/08/1991EP0426250A1 Process for manufacturing a device having MIS transistors with a gate overlapping the lightly-doped source and drain regions
05/08/1991EP0426246A1 Interconnection structure
05/08/1991EP0426241A2 Process for the manufacture of a component to limit the programming voltage and to stabilise the voltage incorporated in an electric device with EEPROM memory cells
05/08/1991EP0426151A2 Method of manufacturing a multi-layered wiring structure of semiconductor integrated circuit device
05/08/1991EP0426105A1 Chemical vapor growth apparatus
05/08/1991EP0426103A2 Electronic circuit device for protecting electronic circuits from unwanted removal of ground terminal
05/08/1991EP0426007A2 Apparatus for loading and re-slicing semiconductor wafer
05/08/1991EP0425966A1 Method for controlling wire loop height
05/08/1991EP0425965A2 Method of fabricating semiconductor structures
05/08/1991EP0425957A2 Method of manufacturing a semiconductor device involving a step of patterning an insulating layer
05/08/1991EP0425891A2 Radiation sensitive mixture
05/08/1991EP0425837A1 Method of adjusting concentration of oxygen in silicon single crystal and apparatus for use in the method
05/08/1991EP0425812A2 Chip breaker for polycrystalline CBN and diamond compacts
05/08/1991EP0425796A2 Apparatus for and method using the apparatus for the encapsulation of electronic modules
05/08/1991EP0425787A2 Method for fabricating high circuit density, self-aligned metal lines to contact windows
05/08/1991EP0425775A1 Semiconductor package with ground plane
05/08/1991EP0425634A1 Connection device between the body and the mouth-piece of a vacuum pipette
05/08/1991EP0425607A1 High-density, multi-level interconnects, flex circuits, and tape for tab
05/08/1991EP0149685B1 Method for automatically counting etched pits
05/08/1991DE3936842A1 Wafer conveyor for clean room - has separator with scanners fitted above conveyor track and carrier-aligning guides
05/08/1991DE3936488A1 Flexible base material for prodn. of electrical circuits etc. - by coating copper foil with filled polyamide-acid or polyimide base-coat, with similar unfilled top-coat, and stoving combination
05/08/1991DE3935189A1 Ionic etching substrates of silicon di:oxide coated - with poly-silicon or silicide layers-using etching gas of chlorine, silicon chloride and nitrogen
05/08/1991CN1012603B Method of fabricating solar cells with silicon nitride coating
05/08/1991CN1012602B Tab bonded semiconductor chip package method
05/07/1991US5014243 Programmable read only memory (PROM) having circular shaped emitter regions
05/07/1991US5014241 Dynamic semiconductor memory device having reduced soft error rate
05/07/1991US5014113 Multiple layer lead frame
05/07/1991US5014111 Electrical contact bump and a package provided with the same
05/07/1991US5014109 Miniaturization of a contact hole in a semiconductor device
05/07/1991US5014108 MESFET for dielectrically isolated integrated circuits
05/07/1991US5014107 Process for fabricating complementary contactless vertical bipolar transistors
05/07/1991US5014106 Semiconductor device for use in a hybrid LSI circuit
05/07/1991US5014104 Semiconductor integrated circuit having CMOS inverters
05/07/1991US5014103 Dynamic random access memory having improved layout and method of arranging memory cell pattern of the dynamic random access memory
05/07/1991US5014102 MOSFET-gated bipolar transistors and thyristors with both turn-on and turn-off capability having single-polarity gate input signal
05/07/1991US5014101 Semiconductor IGBT with improved turn-off switching time
05/07/1991US5014098 CMOS integrated circuit with EEPROM and method of manufacture
05/07/1991US5014097 On-chip high voltage generator and regulator in an integrated circuit
05/07/1991US5014003 Conductive pattern for electric test of semiconductor chips
05/07/1991US5014001 Test probe manipulator for wafer-probing apparatus
05/07/1991US5013985 Microcomputer with motor controller circuit
05/07/1991US5013942 Clock supply circuit having adjustment capacitance
05/07/1991US5013936 BiCMOS logic circuit using complementary bipolar transistors having their emitters connected together
05/07/1991US5013871 Kit for the assembly of a metal electronic package
05/07/1991US5013693 Semiconductors
05/07/1991US5013692 Process for preparing a silicon nitride insulating film for semiconductor memory device
05/07/1991US5013691 Anisotropic deposition of silicon dioxide
05/07/1991US5013690 Method for deposition of silicon films from azidosilane sources
05/07/1991US5013689 Method of forming a passivation film
05/07/1991US5013688 Method of manufacturing a semiconductor using plasma processing
05/07/1991US5013686 Method of making semiconductor devices having ohmic contact