| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
|---|
| 07/23/1991 | US5034688 Temperature conditioning support for small objects such as semi-conductor components and thermal regulation process using said support |
| 07/23/1991 | US5034685 Test device for testing integrated circuits |
| 07/23/1991 | US5034647 Inchworm type driving mechanism |
| 07/23/1991 | US5034625 Semiconductor substrate bias circuit |
| 07/23/1991 | US5034611 Method for non-destructive identification for electronic inhomogeneities in semiconductor layers |
| 07/23/1991 | US5034591 Tape automated bonding leads having a stiffener and a method of bonding with same |
| 07/23/1991 | US5034357 Heat-conductive aluminum nitride sintered body and method of manufacturing the same |
| 07/23/1991 | US5034351 Process for forming a feature on a substrate without recessing the surface of the substrate |
| 07/23/1991 | US5034348 Process for forming refractory metal silicide layers of different thicknesses in an integrated circuit |
| 07/23/1991 | US5034347 Semiconductors, microwaves |
| 07/23/1991 | US5034345 Method of fabricating a bump electrode for an integrated circuit device |
| 07/23/1991 | US5034343 Manufacturing ultra-thin wafer using a handle wafer |
| 07/23/1991 | US5034342 Method of forming semiconductor stalk structure by epitaxial growth in trench |
| 07/23/1991 | US5034341 Miniaturization, semiconductors |
| 07/23/1991 | US5034340 Amorphous silicon thin film transistor array substrate and method for producing the same |
| 07/23/1991 | US5034339 Method for producing amorphous silicon thin film transistor array substrate |
| 07/23/1991 | US5034338 Circuit containing integrated bipolar and complementary MOS transistors on a common substrate |
| 07/23/1991 | US5034337 Method of making an integrated circuit that combines multi-epitaxial power transistors with logic/analog devices |
| 07/23/1991 | US5034336 Semiconductors |
| 07/23/1991 | US5034335 Method of manufacturing a silicon on insulator (SOI) semiconductor device |
| 07/23/1991 | US5034333 PIN semiconductor |
| 07/23/1991 | US5034305 Radiation-sensitive mixture |
| 07/23/1991 | US5034245 Multilayer resin on circuit substrate, electrode patterns |
| 07/23/1991 | US5034200 Crucibles coaxially disposed, multicompartment, doped melts |
| 07/23/1991 | US5034199 Zone melt recrystallization apparatus |
| 07/23/1991 | US5034092 Plasma etching of semiconductor substrates |
| 07/23/1991 | US5034091 Erosion masking a multilayer element, dielectrics, resists |
| 07/23/1991 | US5034090 Process for manufacturing semiconductor device involving dry etching an organic resist layer |
| 07/23/1991 | US5034083 Process and apparatus for assembling smaller scanning or printing arrays together to form an extended array |
| 07/23/1991 | US5034044 Hermetic sealing, silicon glass |
| 07/23/1991 | US5033783 Parts mounting apparatus |
| 07/23/1991 | US5033666 Electronics |
| 07/23/1991 | US5033615 Wrapped glass cap article |
| 07/23/1991 | US5033538 Workpiece carrier for a disk-shaped workpiece as well as a vacuum process space |
| 07/23/1991 | US5033407 Low pressure vapor phase growth apparatus |
| 07/23/1991 | US5033406 Side lifting tool wafer-boat assembly |
| 07/23/1991 | CA1286818C Rapid curing, thermally stable adhesive |
| 07/23/1991 | CA1286802C Method of forming 3-d structures using movpe growth with in-situ photoetching |
| 07/23/1991 | CA1286801C Etch back detection |
| 07/23/1991 | CA1286800C Heterojunction bipolar transistors |
| 07/23/1991 | CA1286799C Transistor |
| 07/23/1991 | CA1286798C Device fabrication method involving deposition of metal-containing material and resulting devices |
| 07/23/1991 | CA1286797C Rotary developer and method for its use |
| 07/23/1991 | CA1286796C Double wafer moated signal processor |
| 07/23/1991 | CA1286795C Fabrication of interlayer conductive paths in integrated circuits |
| 07/23/1991 | CA1286794C Apparatus for dry processing a semiconductor wafer |
| 07/23/1991 | CA1286573C Controlled boron doping of silicon |
| 07/23/1991 | CA1286572C Trench sidewall isolation by polysilicon oxidation |
| 07/23/1991 | CA1286571C Crucible recovering method and apparatus therefor |
| 07/23/1991 | CA1286494C Bubbler cylinder device |
| 07/20/1991 | CA2034384A1 Disubstituted aromatic dianhydrides and polyimides prepared therefrom |
| 07/18/1991 | DE4101130A1 MOSFET with source and drain regions - enclosed by opposite conductivity type basin layers |
| 07/18/1991 | DE4000599A1 PN-junction device, esp. hetero-bi:polar transistor - with semi-insulating interlayer giving low parasitic capacitance |
| 07/18/1991 | DE4000351A1 Mfg. integrated circuit with two complementary bipolar transistors - doping full surface conductive layer as first conductivity for base of one, and emitter coupling for second transistor |
| 07/17/1991 | EP0437371A2 Method of manufacturing semiconductor device |
| 07/17/1991 | EP0437355A1 Process and apparatus for preparing a thin film electroluminescent device |
| 07/17/1991 | EP0437328A2 Reflective-type liquid crystal display device |
| 07/17/1991 | EP0437307A2 High resistance polysilicon load resistor |
| 07/17/1991 | EP0437306A2 Self-aligning contact and interconnect structure |
| 07/17/1991 | EP0437196A1 Liquid source container device |
| 07/17/1991 | EP0437146A1 Storage device for flat pieces in racks with intermediate storage |
| 07/17/1991 | EP0437110A2 Tungsten deposition process for low contact resistivity to silicon |
| 07/17/1991 | EP0437018A2 A wafer centering assembly |
| 07/17/1991 | EP0436988A2 A semiconductor device |
| 07/17/1991 | EP0436930A2 Alignment marks for two objects to be aligned in superposition |
| 07/17/1991 | EP0436912A1 Integrated circuit solder die-attach design and method |
| 07/17/1991 | EP0436844A2 High purity hydroxy-terminated phenyl ladder polysiloxane and method for producing the same |
| 07/17/1991 | EP0436829A2 Quantum well structure |
| 07/17/1991 | EP0436812A1 Copper etch process and printed circuit formed thereby |
| 07/17/1991 | EP0436777A2 Method and apparatus for analog testing of thin film transistor arrays |
| 07/17/1991 | EP0436753A1 Method for fabricating a self-aligned base-emitter complex |
| 07/17/1991 | EP0436731A1 Film for wafer processing |
| 07/17/1991 | EP0436652A1 Hybrid microchip bonding article |
| 07/17/1991 | EP0436639A1 Multifunctional photolithographic compositions |
| 07/17/1991 | EP0436588A1 Low stress polysilicon microstructures. |
| 07/17/1991 | EP0261190B1 Method for the surface passivation of an indium phosphide substrate and new product obtained |
| 07/17/1991 | EP0252115B1 Compressive pedestal for microminiature connections |
| 07/17/1991 | CN1053146A Mixed matter epitaxy on gallium arsenide substrate |
| 07/16/1991 | US5033068 Charge transfer device |
| 07/16/1991 | US5033023 High density EEPROM cell and process for making the cell |
| 07/16/1991 | US5033022 Semiconductor memory device having low noise bit line structure |
| 07/16/1991 | US5032895 Semiconductor device and method of producing the same |
| 07/16/1991 | US5032893 Method for reducing or eliminating interface defects in mismatched semiconductor eiplayers |
| 07/16/1991 | US5032889 Wiring structure in a wafer-scale integrated circuit |
| 07/16/1991 | US5032887 Bipolar power semiconductor device and process for its manufacture |
| 07/16/1991 | US5032886 High-frequency power transistor |
| 07/16/1991 | US5032882 Semiconductor device having trench type structure |
| 07/16/1991 | US5032881 Asymmetric virtual ground EPROM cell and fabrication method |
| 07/16/1991 | US5032880 Semiconductor device having an interposing layer between an electrode and a connection electrode |
| 07/16/1991 | US5032878 High voltage planar edge termination using a punch-through retarding implant |
| 07/16/1991 | US5032877 Quantum-coupled ROM |
| 07/16/1991 | US5032786 Method of a measuring physical properties of buried channel |
| 07/16/1991 | US5032727 Product defect detection using thermal ratio analysis |
| 07/16/1991 | US5032694 Tantalum and oxide, bonding strength |
| 07/16/1991 | US5032691 Electric circuit assembly with voltage isolation |
| 07/16/1991 | US5032545 Process for preventing a native oxide from forming on the surface of a semiconductor material and integrated circuit capacitors produced thereby |
| 07/16/1991 | US5032544 Process for producing semiconductor device substrate using polishing guard |
| 07/16/1991 | US5032543 Encapsulation, dissolving |
| 07/16/1991 | US5032542 Method of mass-producing integrated circuit devices using strip lead frame |
| 07/16/1991 | US5032541 Method of producing a semiconductor device including a Schottky gate |