Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
07/1991
07/02/1991US5028982 Semiconductor device
07/02/1991US5028981 Semiconductor device and manufacturing method therefor
07/02/1991US5028979 Table cloth matrix of EPROM memory cells with buried junctions, individually accessible by a traditional decoder
07/02/1991US5028976 Complementary MOS integrated circuit device
07/02/1991US5028975 Semiconductor devices and a process for producing the same
07/02/1991US5028897 Microwave transmission arrangement
07/02/1991US5028841 Chip mounting techniques for display apparatus
07/02/1991US5028797 An alignment system for align first and second objects using alignment marks
07/02/1991US5028795 Ion implantation apparatus
07/02/1991US5028780 Preparation and observation method of micro-section
07/02/1991US5028650 Boron nitride sheets
07/02/1991US5028566 Method of forming silicon dioxide glass films
07/02/1991US5028565 Process for CVD deposition of tungsten layer on semiconductor wafer
07/02/1991US5028564 Edge doping processes for mesa structures in SOS and SOI devices
07/02/1991US5028561 Method of growing p-type group II-VI material
07/02/1991US5028560 Method for forming a thin layer on a semiconductor substrate
07/02/1991US5028559 Fabrication of devices having laterally isolated semiconductor regions
07/02/1991US5028558 Polishing, Grinding, Thickness, Precision
07/02/1991US5028557 Method of making a reverse self-aligned BIMOS transistor integrated circuit
07/02/1991US5028556 Integrated Circuits
07/02/1991US5028555 Self-aligned semiconductor devices
07/02/1991US5028554 Process of fabricating an MIS FET
07/02/1991US5028552 Method of manufacturing insulated-gate type field effect transistor
07/02/1991US5028550 Method of manufacturing semiconductor device
07/02/1991US5028549 Etched back edge isolation process for heterojunction bipolar transistors
07/02/1991US5028548 Method of manufacturing a planar semiconductor device having a guard ring structure
07/02/1991US5028488 Can be deposited on amorphous substrate, solar cells
07/02/1991US5028473 Three dimensional microcircuit structure and process for fabricating the same from ceramic tape
07/02/1991US5028457 Roll coating apparatus and method capable of providing coatings without pin holes
07/02/1991US5028455 Method for preparing plzt, pzt and plt sol-gels and fabricating ferroelectric thin films
07/02/1991US5028454 Electroless plating of portions of semiconductor devices and the like
07/02/1991US5028296 Mercury Cadmium Telluride Semiconductors
07/02/1991US5028200 Wafer positioning mechanism using a notch formed on the wafer periphery
07/02/1991US5028195 Horizontal/vertical conversion transporting apparatus
07/02/1991US5028122 Liquid crystal active-matrix display device
07/02/1991US5027997 Silicon chip metallization system
07/02/1991US5027995 Process for bonding semiconductor chips to substrates
07/02/1991US5027746 Epitaxial reactor having a wall which is protected from deposits
07/02/1991CA1285664C Lithographic process using mask with small opaque or transparent elements
07/02/1991CA1285663C Buried contact structure for reducing resistance in integrated circuits
07/02/1991CA1285616C Test adapter for integrated circuit carrier
07/02/1991CA1285612C Low resistance electrical interconnection for synchronous rectifiers
06/1991
06/28/1991CA2032884A1 Radiation-sensitive positive resist composition
06/28/1991CA2031111A1 Semiconductor package connecting method, semiconductor package connecting wires and semiconductor devices
06/27/1991WO1991009425A1 Method of manufacturing a solid-state device and solid-state device, particularly semiconductor device
06/27/1991WO1991009424A1 Power mosfet transistor circuit
06/27/1991WO1991009422A1 Method of making crack-free insulating films with sog interlayer
06/27/1991WO1991009419A1 Flip chip technology using electrically conductive polymers and dielectrics
06/27/1991WO1991009346A1 Positive resist composition
06/27/1991WO1991009161A1 Process for forming epitaxial film
06/27/1991WO1991009150A1 Method of and device for plasma treatment
06/27/1991WO1991009148A1 Device for vacuum treatment and device for and method of film formation using said device
06/27/1991WO1991009071A1 Electronic articles containing a fluorinated poly(arylene ether) dielectric
06/27/1991WO1991008968A1 Dual track handling and processing system
06/27/1991WO1991008863A1 Methods of preparation of surfaces and applications thereof
06/27/1991WO1991008850A1 Method of manufacturing minute metallic balls uniform in size
06/27/1991DE3942387A1 Transportsystem, insbesondere zum transportieren von siliziumeinkristallen durch das becken eines forschungsreaktors Transport system, particularly for transport of silicon single crystals by the pool of a research reactor
06/27/1991DE3940933A1 Press deformation of soldered base plate - esp. to form convexly curved semiconductor module base plate
06/27/1991CA2046908A1 Positive resist composition
06/26/1991EP0434643A2 Quantitative assessment of the geometrical distortion suffered by the profile of a semiconductor wafer
06/26/1991EP0434442A2 Positive photoresist composition
06/26/1991EP0434434A1 Fountain etch system
06/26/1991EP0434414A1 IC carrier
06/26/1991EP0434383A1 Semiconductor device gate structure with oxide layer therein
06/26/1991EP0434318A2 Low sheet resistance diffused contacts to buried diffused resistors using isolation regions and buried layer
06/26/1991EP0434312A2 Bonding a conductor to a substrate
06/26/1991EP0434307A2 Centrifugal spin dryer for semiconductor wafer
06/26/1991EP0434264A2 Package for power semiconductor components
06/26/1991EP0434234A2 MOS devices having improved electrical match
06/26/1991EP0434182A2 Fabrication of buried layers in integrated circuits
06/26/1991EP0434161A2 Active matrix electro-optic display device with storage capacitors and projection color apparatus employing same
06/26/1991EP0434153A1 A method of making a semiconductor device with a npn bipolar transistor
06/26/1991EP0434142A1 Method of manufacturing a device and group of masks for this method
06/26/1991EP0434141A1 Method for encoding identification information on circuit dice using step and repeat lithography
06/26/1991EP0434138A1 Method of forming an aluminum conductor with highly oriented grain structure
06/26/1991EP0434137A2 System for partitioning and testing submodule circuits of an integrated circuit
06/26/1991EP0434121A1 Non-volatile split gate EPROM memory cell and self-aligned field insulation process for obtaining the above cell
06/26/1991EP0434045A2 Method of forming conductive material selectively
06/26/1991EP0433985A2 Spatial light modulator printer
06/26/1991EP0433983A2 Copper etch process using halides
06/26/1991EP0433548A1 Semi-insulating gallium arsenide by oxygen doping in metal-organic vapor phase epitaxy
06/26/1991EP0433503A1 Vacuum chuck
06/26/1991EP0433467A1 Fabrication of complementary patterns for exposing semiconductor chips with self-supporting masks
06/26/1991EP0216937B1 Ic card
06/26/1991CN1052573A Lateral pnp transistor using latch voltage of npn transistor
06/26/1991CN1052572A Integrated circuit isolation process
06/26/1991CN1052571A Permanent-magnetic circuit structure uniformly adjustable in large area for dry technology
06/26/1991CN1052559A Optical near field microlithography process and microlithography device using it
06/26/1991CN1052558A Aqueous processible photopolymerizable compositions capable of photolytically generating metal ions
06/26/1991CN1052513A Method of anisotropically etching silicon wafers and wafer etching solution
06/26/1991CN1012961B Photopolymerizable compositions containing inorganic fillers
06/25/1991USRE33622 Integrated circuits having stepped dielectric regions
06/25/1991US5027327 Semiconductor memory
06/25/1991US5027322 Circuit configuration for identification of integrated semiconductor circuitries
06/25/1991US5027321 Apparatus and method for improved reading/programming of virtual ground EPROM arrays
06/25/1991US5027252 Semiconductor input protection device
06/25/1991US5027192 Fast power semiconductor circuit
06/25/1991US5027189 Integrated circuit solder die-attach design and method
06/25/1991US5027188 Semiconductor integrated circuit device in which a semiconductor chip is mounted with solder bumps for mounting to a wiring substrate
06/25/1991US5027187 Contactors