Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/1996
05/22/1996CN1031851C Method for prepn. of ultramicro-quantum device
05/21/1996US5519749 Horizontal charge coupled device having a multiple reset gate
05/21/1996US5519720 Semiconductor light emitting device
05/21/1996US5519665 Semiconductor memory device having word line driver requiring single word line drive signal
05/21/1996US5519658 Semiconductor integrated circuit device and methods for production thereof
05/21/1996US5519650 Semiconductor device having an improved immunity to a short-circuit at a power supply line
05/21/1996US5519632 Automatic DCS routing for multilayer packages to minimize coupled noise
05/21/1996US5519631 Method of arranging components in semiconductor device
05/21/1996US5519629 Tileable gate array cell for programmable logic devices and gate array having tiled gate array cells
05/21/1996US5519582 Magnetic induction coil for semiconductor devices
05/21/1996US5519566 Method of manufacturing ferroelectric bismuth layered oxides
05/21/1996US5519351 Method for arranging tree-type clock signal distributing circuit with small clock skew
05/21/1996US5519347 Start-up circuit for stable power-on of semiconductor memory device
05/21/1996US5519336 Method for electrically characterizing the insulator in SOI devices
05/21/1996US5519334 System and method for measuring charge traps within a dielectric layer formed on a semiconductor wafer
05/21/1996US5519332 Carrier for testing an unpackaged semiconductor die
05/21/1996US5519254 Multilayer aluminum wiring in semiconductor IC
05/21/1996US5519252 Power semiconductor device employing pin block connection arrangement for facilitated and economized manufacture
05/21/1996US5519251 Semiconductor device and method of producing the same
05/21/1996US5519250 Reliability of metal leads in high speed LSI semiconductors using both dummy leads and thermoconductive layers
05/21/1996US5519249 Vertical type bipolar transistor
05/21/1996US5519246 Nonvolatile memory apparatus using an ultraviolet impermeable resin film
05/21/1996US5519243 Semiconductor device and manufacturing method thereof
05/21/1996US5519242 Electrostatic discharge protection circuit for a NMOS or lateral NPN transistor
05/21/1996US5519241 Circuit structure having at least one bipolar power component and method for the operation thereof
05/21/1996US5519239 Structure and method for improved memory arrays and improved electrical contacts in semiconductor devices
05/21/1996US5519238 Rippled polysilicon surface capacitor electrode plate for high density dram
05/21/1996US5519236 Semiconductor memory device having surrounding gate transistor
05/21/1996US5519235 Polycrystalline ferroelectric capacitor heterostructure employing hybrid electrodes
05/21/1996US5519234 Ferroelectric dielectric memory cell can switch at least giga cycles and has low fatigue - has high dielectric constant and low leakage current
05/21/1996US5519232 Transistor comprising a periodic length structure gate controlling electron conductivity
05/21/1996US5519231 Pressure-connection type semiconductor device having a thermal compensator in contact with a semiconductor base substrate in an alloy-free state
05/21/1996US5519193 Method and apparatus for stressing, burning in and reducing leakage current of electronic devices using microwave radiation
05/21/1996US5518967 Process for producing a semiconductor device capable of planarizing a metal film surface thereon
05/21/1996US5518966 Method for wet etching polysilicon
05/21/1996US5518964 Microelectronic mounting with multiple lead deformation and bonding
05/21/1996US5518963 Method for forming metal interconnection of semiconductor device
05/21/1996US5518962 Planarized interlayer insulating film formed of stacked BPSG film and ozone-teos NSG film in semiconductor device and method for forming the same
05/21/1996US5518961 Semiconductor integrated circuit device with wiring microstructure formed on gates and method of manufacturing the same
05/21/1996US5518960 Method of manufacturing a wiring layer including amorphous silicon and refractory metal silicide
05/21/1996US5518959 Method for selectively depositing silicon oxide spacer layers
05/21/1996US5518958 Prevention of agglomeration and inversion in a semiconductor polycide process
05/21/1996US5518957 Method for making a thin profile semiconductor package
05/21/1996US5518956 Method of isolating vertical shorts in an electronic array using laser ablation
05/21/1996US5518955 Method of fabricating quantum wire
05/21/1996US5518953 Method for manufacturing semiconductor device having grown layer on insulating layer
05/21/1996US5518952 Method of coating a piezoelectric substrate with a semiconducting material
05/21/1996US5518950 Spin-on-glass filled trench isolation method for semiconductor circuits
05/21/1996US5518949 Electrical isolation method for devices made on SOI wafer
05/21/1996US5518948 Method of making cup-shaped DRAM capacitor having an inwardly overhanging lip
05/21/1996US5518947 Method of forming a semiconductor memory device having silicon nitride overlying only in peripheral circuit area
05/21/1996US5518946 Process for fabricating capacitors in dynamic RAM
05/21/1996US5518945 Method of making a diffused lightly doped drain device with built in etch stop
05/21/1996US5518944 MOS transistor and its fabricating method
05/21/1996US5518943 Method of manufacturing nonvolatile semiconductor memory device having an implanted damage layer
05/21/1996US5518942 Method of making flash EPROM cell having improved erase characteristics by using a tilt angle implant
05/21/1996US5518941 Maskless method for formation of a field implant channel stop region
05/21/1996US5518940 Method of manufacturing thin film transistors in a liquid crystal display
05/21/1996US5518939 Method and apparatus for static RAM
05/21/1996US5518938 Process for fabricating a CMOS transistor having high-voltage metal-gate
05/21/1996US5518936 Forming metal layer on dielectric substrate, doping surface of metal, then oxidizing surface of metal yields new dielectric layer having greater surface resistance
05/21/1996US5518860 Improved adhesion to silicon oxide and nitride substrates
05/21/1996US5518805 Hillock-free multilayer metal lines for high performance thin film structures
05/21/1996US5518776 Production of strontium titanate thin films
05/21/1996US5518771 Method and apparatus for subjecting a workpiece to elevated pressure
05/21/1996US5518684 Method of making a molded lead frame
05/21/1996US5518663 Thick film conductor compositions with improved adhesion
05/21/1996US5518595 Focused ion beam etching apparatus
05/21/1996US5518593 Shield configuration for vacuum chamber
05/21/1996US5518572 Plasma processing system and method
05/21/1996US5518552 Rotation of scrubber surface, rinsing with water solution and adhesion by centrifugal force
05/21/1996US5518550 Stage apparatus for an exposure apparatus including a contant tension spring for canceling out a gravitational force of a movable stage by a tensile force
05/21/1996US5518549 Susceptor and baffle therefor
05/21/1996US5518542 Double-sided substrate cleaning apparatus
05/21/1996US5518450 Method and apparatus for protecting uultraclean surfaces
05/21/1996US5518360 Wafer carrying device and wafer carrying method
05/21/1996US5518131 Etching molydbenum with ferric sulfate and ferric ammonium sulfate
05/21/1996US5518120 Anti-static package for protecting sensitive electronic components from electrostatic charges
05/21/1996US5517943 Vacuum CVD apparatus
05/21/1996US5517756 Method of making substrate member having electrical lines and apertured insulating film
05/21/1996US5517754 Fabrication processes for monolithic electronic modules
05/21/1996US5517752 Method of connecting a pressure-connector terminal of a device with a terminal electrode of a substrate
05/21/1996US5517751 Multilayer microelectronic wiring module and method for forming the same
05/21/1996CA2035680C Poly(arylenevinylenesiloxanes)
05/17/1996WO1996014665A1 Ballast monitoring for radio frequency power transistors
05/17/1996WO1996014663A1 Method of forming bit line contacts in stacked capacitor drams
05/17/1996WO1996014661A1 Spacer-based antifuse structure for low capacitance and high reliability and method of fabrication thereof
05/17/1996WO1996014660A1 Method for fabricating a self-limiting silicon based interconnect for testing bare semiconductor dice
05/17/1996WO1996014659A1 Method for forming contact pins for semiconductor dice and interconnects
05/17/1996WO1996014658A1 Integrated circuit with complementary isolated bipolar transitors and method of making same
05/17/1996WO1996014657A1 Integrated circuit passivation process and structure
05/17/1996WO1996014656A2 Quantum dot fabrication process using strained epitaxial growth
05/17/1996WO1996014164A1 Spin-on-glass process with controlled environment
05/17/1996CA2204382A1 Ballast monitoring for radio frequency power transistors
05/15/1996EP0712164A2 Semiconductor device
05/15/1996EP0712163A1 Electrically erasable non-volatile memory device and method of manufacturing such a device
05/15/1996EP0712162A2 A nonvolatile semiconductor memory device and method of manufacturing thereof
05/15/1996EP0712158A2 Resin sealing type semiconductor device with cooling member and method of making the same
05/15/1996EP0712156A2 Process for producing multilevel metallization in an integrated circuit
05/15/1996EP0712155A2 Method for making ohmic contact to lightly doped islands from a silicide buried layer and applications