Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2013
06/18/2013US8466063 Integration of bottom-up metal film deposition
06/18/2013US8466062 TSV backside processing using copper damascene interconnect technology
06/18/2013US8466061 Method for forming a through via in a semiconductor element and semiconductor element comprising the same
06/18/2013US8466060 Stackable power MOSFET, power MOSFET stack, and process of manufacture
06/18/2013US8466059 Multi-layer interconnect structure for stacked dies
06/18/2013US8466058 Process to remove Ni and Pt residues for NiPtSi applications using chlorine gas
06/18/2013US8466057 Integrated circuit packaging system with filled vias and method of manufacture thereof
06/18/2013US8466056 Method of forming metal interconnect structures in ultra low-k dielectrics
06/18/2013US8466055 Semiconductor device and method of manufacturing semiconductor device
06/18/2013US8466054 Thermal conduction paths for semiconductor structures
06/18/2013US8466053 Method of manufacturing semiconductor device, and semiconductor device
06/18/2013US8466052 Method of fabricating semiconductor device having buried wiring
06/18/2013US8466051 Method for fabricating Schottky device
06/18/2013US8466050 Method for dual energy implantation for ultra-shallow junction formation of MOS devices
06/18/2013US8466049 Semiconductor device producing method with selective epitaxial growth
06/18/2013US8466048 Selective recrystallization of semiconductor
06/18/2013US8466047 Irradiation with high energy ions for surface structuring and treatment of surface proximal sections of optical elements
06/18/2013US8466046 Method for fabricating a porous semiconductor body region
06/18/2013US8466045 Method of forming strained epitaxial carbon-doped silicon films
06/18/2013US8466044 Memory cell that includes a carbon-based memory element and methods forming the same
06/18/2013US8466043 Process of internal gettering for Czochralski silicon wafer
06/18/2013US8466042 Method for manufacturing separated micromechanical components situated on a silicon substrate and components manufactured therefrom
06/18/2013US8466041 Method for manufacturing lamination type semiconductor integrated device
06/18/2013US8466040 Method of manufacturing semiconductor device
06/18/2013US8466039 Pressurized treatment of substrates to enhance cleaving process
06/18/2013US8466038 Process for fabricating integrated-circuit chips
06/18/2013US8466037 Method for producing a thin chip comprising an integrated circuit
06/18/2013US8466036 Trap rich layer for semiconductor devices
06/18/2013US8466035 Methods and compositions for doping silicon substrates with molecular monolayers
06/18/2013US8466034 Method of manufacturing a finned semiconductor device structure
06/18/2013US8466033 Light emitting diode and manufacturing method thereof
06/18/2013US8466031 Mixed valent oxide memory and method
06/18/2013US8466030 Semiconductor device and fabricating method thereof
06/18/2013US8466029 Compound semiconductor device and manufacturing method of the same
06/18/2013US8466028 Method for manufacturing multigate device
06/18/2013US8466027 Silicide formation and associated devices
06/18/2013US8466026 Semiconductor device and method for manufacturing the same
06/18/2013US8466025 Semiconductor device structures and related processes
06/18/2013US8466024 Power domain controller with gated through silicon via having FET with horizontal channel
06/18/2013US8466023 Semiconductor device and method for fabricating the same
06/18/2013US8466022 Semiconductor memory device and method for manufacturing the same
06/18/2013US8466021 Semiconductor device and manufacturing method thereof
06/18/2013US8466020 Method of producing semiconductor device
06/18/2013US8466018 Methods of forming a PMOS device with in situ doped epitaxial source/drain regions
06/18/2013US8466017 Methods of making semiconductor devices having implanted sidewalls and devices made thereby
06/18/2013US8466016 Hafnium tantalum oxynitride dielectric
06/18/2013US8466015 Thin film transistors in pixel and driving portions characterized by surface roughness
06/18/2013US8466014 Manufacturing method of semiconductor device
06/18/2013US8466013 Method for manufacturing a semiconductor structure
06/18/2013US8466012 Bulk FinFET and SOI FinFET hybrid technology
06/18/2013US8466011 Encapsulation methods for organic electrical devices
06/18/2013US8466008 Stacked semiconductor package and stacking method thereof
06/18/2013US8466007 Power semiconductor module and fabrication method
06/18/2013US8466006 Thermally insulated phase material cells
06/18/2013US8466005 Method for forming metal oxides and silicides in a memory device
06/18/2013US8466003 Methods of building crystalline silicon solar cells for use in combinatorial screening
06/18/2013US8466002 Methods of manufacturing a solar cell
06/18/2013US8466001 Low-cost solution approach to deposit selenium and sulfur for Cu(In,Ga)(Se,S)2 formation
06/18/2013US8465999 Manufacturing method for image sensor IC
06/18/2013US8465998 Thermoelectric conversion module and method for manufacturing thermoelectric conversion module
06/18/2013US8465996 Surface treatment to improve resistive-switching characteristics
06/18/2013US8465995 Array substrate for fringe field switching mode liquid crystal display and method of manufacturing the same
06/18/2013US8465994 Method for fabricating active-matrix display device
06/18/2013US8465992 Method of manufacturing flexible display device
06/18/2013US8465991 Carbon containing low-k dielectric constant recovery using UV treatment
06/18/2013US8465990 Manufacturing method of magneto-resistance effect element
06/18/2013US8465907 Manufacturing method for exposure mask, generating method for mask substrate information, mask substrate, exposure mask, manufacturing method for semiconductor device and server
06/18/2013US8465660 Fabrication process of a microfabricated blazed grating
06/18/2013US8465620 Hollow anode plasma reactor and method
06/18/2013US8465593 Substrate processing apparatus and gas supply method
06/18/2013US8465011 Fixing jig and method of processing work
06/18/2013US8465005 Pneumatic multi-weight balancing device
06/18/2013US8464418 Method for temperature compensation in MEMS resonators with isolated regions of distinct material
06/18/2013CA2713810C Self-assembly monolayer modified printhead
06/18/2013CA2454895C Methods of nanotube films and articles
06/13/2013WO2013086432A2 High throughput load lock for solar wafers
06/13/2013WO2013086343A1 Apparatuses and methods for transposing select gates
06/13/2013WO2013086264A1 Composition comprising fluoroalkyl perfluoroalkene ethers and uses thereof
06/13/2013WO2013086232A1 Method for forming a semiconductor device
06/13/2013WO2013086226A1 Electro processor with shielded contact ring
06/13/2013WO2013085941A1 Selective deposition by use of a polymeric mask
06/13/2013WO2013085929A1 Charged particle beam scanning using deformed high gradient insulator
06/13/2013WO2013085839A2 Semiconductor modules and methods of forming the same
06/13/2013WO2013085763A1 System and method for cleaning gas injectors
06/13/2013WO2013085687A1 Laser reflectometry for substrate processing
06/13/2013WO2013085684A1 Doping of dielectric layers
06/13/2013WO2013085566A1 High current high voltage gan field effect transistors and method of fabricating same
06/13/2013WO2013085542A1 Reducing dielectric loss in solder masks
06/13/2013WO2013085536A1 Method for forming superactive deactivation-resistant junctions with laser anneal and multiple implants
06/13/2013WO2013085534A1 Strain compensation in transistors
06/13/2013WO2013085492A1 Shaped and oriented solder joints
06/13/2013WO2013085490A1 Interlayer dielectric for non-planar transistors
06/13/2013WO2013085341A1 Substrate processing apparatus
06/13/2013WO2013085290A1 Method for manufacturing semiconductor device
06/13/2013WO2013085277A1 Adhesive tape for assembling semiconductor
06/13/2013WO2013085079A1 Pipe joint structure for semiconductor processing
06/13/2013WO2013085055A1 Exposure apparatus and exposure method
06/13/2013WO2013085019A1 Connection method, connection structure, insulating adhesive member, electronic component having adhesive member, and method for manufacturing same
06/13/2013WO2013084986A1 Method for manufacturing silicon substrate having textured structure
06/13/2013WO2013084978A1 Photomask substrate for titania-silica glass euv lithography