Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2013
06/13/2013US20130149816 Semiconductor device and method for manufacturing semiconductor device
06/13/2013US20130149802 Method of manufacturing semiconductor element
06/13/2013US20130149800 Method of Controlling Semiconductor Device Fabrication
06/13/2013US20130149799 Wafer temperature correction system for ion implantation device
06/13/2013US20130149796 Semiconductor device with ferro-electric capacitor
06/13/2013US20130149795 Etching method and method of manufacturing semiconductor device
06/13/2013US20130149794 Method of manufacturing semiconductor device
06/13/2013US20130149647 Holding apparatus, drawing apparatus, and method of manufacturing article
06/13/2013US20130149637 Titania and sulfur co-doped quartz glass member and making method
06/13/2013US20130149485 Support substrate
06/13/2013US20130149468 Methods and apparatus for incorporating nitrogen in oxide films
06/13/2013US20130149078 Substrate-processing apparatus and substrate-transferring method
06/13/2013US20130149075 High throughput load lock for solar wafers
06/13/2013US20130148413 Solid, multi-state molecular random access memory
06/13/2013US20130148401 Systems and methods for stacked semiconductor memory devices
06/13/2013US20130148398 Three-dimensional non-volatile memory device, memory system including the same and method of manufacturing the same
06/13/2013US20130148094 Stage unit, exposure apparatus, and exposure method
06/13/2013US20130148093 Holding apparatus, drawing apparatus, and method of manufacturing article
06/13/2013US20130148090 Exposure apparatus
06/13/2013US20130148075 Liquid crystal lens and manufacturing method thereof
06/13/2013US20130148041 Semiconductor device
06/13/2013US20130147540 Semiconductor modules and methods of forming the same
06/13/2013US20130147509 Test pattern of semiconductor device, method of manufacturing test pattern and method of testing semiconductor device by using test pattern
06/13/2013US20130147472 Micro-Fabricated Atomic Magnetometer and Method of Forming the Magnetometer
06/13/2013US20130147319 Loading element of a film bulk acoustic resonator
06/13/2013US20130147129 Wafer supporting structure
06/13/2013US20130147067 Locally tailoring chemical mechanical polishing (cmp) polish rate for dielectrics
06/13/2013US20130147066 Structure and method for e-beam in-chip overlay mark
06/13/2013US20130147065 Semiconductor Device and Method of Forming Adjacent Channel and Dam Material Around Die Attach Area of Substrate to Control Outward Flow of Underfill Material
06/13/2013US20130147062 Multi-chip package and method of manufacturing the same
06/13/2013US20130147061 Trap Rich Layer with Through-Silicon-Vias in Semiconductor Devices
06/13/2013US20130147059 Chip-to-wafer bonding method and three-dimensional integrated semiconductor device
06/13/2013US20130147057 Through silicon via (tsv) isolation structures for noise reduction in 3d integrated circuit
06/13/2013US20130147056 Resized wafer with a negative photoresist ring and design structures thereof
06/13/2013US20130147055 Semiconductor Device and Method of Forming Guard Ring Around Conductive TSV through Semiconductor Wafer
06/13/2013US20130147054 Semiconductor Device and Method of Forming Thick Encapsulant for Stiffness with Recesses for Stress Relief in FO-WLCSP
06/13/2013US20130147053 Semiconductor Device and Method of Making Single Layer Substrate with Asymmetrical Fibers and Reduced Warpage
06/13/2013US20130147052 Offset of contact opening for copper pillars in flip chip packages
06/13/2013US20130147051 Method of protecting against via failure and structure therefor
06/13/2013US20130147050 Semiconductor having integrally-formed enhanced thermal management
06/13/2013US20130147049 Circuit Probing Structures and Methods for Probing the Same
06/13/2013US20130147047 Integrated Circuit and Method of Forming an Integrated Circuit
06/13/2013US20130147045 Flash Memory Having Multi-Level Architecture
06/13/2013US20130147043 Substrate with embedded stacked through-silicon via die
06/13/2013US20130147041 Stack package structure and fabrication method thereof
06/13/2013US20130147040 Mems chip scale package
06/13/2013US20130147036 Semiconductor Device and Method of Forming UBM Structure on Back Surface of TSV Semiconductor Wafer
06/13/2013US20130147035 Semiconductor Device and Method of Forming Recesses in Conductive Layer to Detect Continuity for Interconnect Between Semiconductor Die and Substrate
06/13/2013US20130147032 Passivation layer for packaged chip
06/13/2013US20130147031 Semiconductor device with bump structure on post-passivation interconncet
06/13/2013US20130147028 Heat spreader for multiple chip systems
06/13/2013US20130147025 Method of stacking flip-chip on wire-bonded chip
06/13/2013US20130147024 Balanced leadframe package structure and method of manufacturing the same
06/13/2013US20130147021 Multi-layer substrate structure and manufacturing method for the same
06/13/2013US20130147020 Component Having a Via and Method for Manufacturing It
06/13/2013US20130147018 Structure for Reducing Integrated Circuit Corner Peeling
06/13/2013US20130147012 Circuit board component shim structure
06/13/2013US20130147009 Semiconductor device and method for manufacturing the same
06/13/2013US20130147007 Deep isolation trench structure and deep trench capacitor on a semiconductor-on-insulator substrate
06/13/2013US20130146996 Magnetic device fabrication
06/13/2013US20130146993 Semiconductor structure having a polysilicon structure and method of forming same
06/13/2013US20130146992 Deep trench embedded gate transistor
06/13/2013US20130146991 Device Including Two Power Semiconductor Chips and Manufacturing Thereof
06/13/2013US20130146989 Integrated semiconductor device and manufacturing method therefor
06/13/2013US20130146984 Semiconductor device and method of manufacturing the same
06/13/2013US20130146983 Nitride based semiconductor device and manufacturing method thereof
06/13/2013US20130146981 Antenna cell design to prevent plasma induced gate dielectric damage in semiconductor integrated circuits
06/13/2013US20130146980 Apparatuses and methods for transposing select gates
06/13/2013US20130146977 Semiconductor structure and method for manufacturing the same
06/13/2013US20130146976 Integrated circuits formed on strained substrates and including relaxed buffer layers and methods for the manufacture thereof
06/13/2013US20130146975 Semiconductor device and integrated circuit with high-k/metal gate without high-k direct contact with sti
06/13/2013US20130146973 Customized shield plate for a field effect transistor
06/13/2013US20130146967 Trench-Gate Resurf Semiconductor Device and Manufacturing Method
06/13/2013US20130146962 Semiconductor device and method of manufacturing the same
06/13/2013US20130146959 Method and Structure For Forming On-Chip High Quality Capacitors With ETSOI Transistors
06/13/2013US20130146958 Method for forming buried bit line, semiconductor device having the same, and fabricating method thereof
06/13/2013US20130146957 Embedded dynamic random access memory device formed in an extremely thin semiconductor on insulator (etsoi) substrate
06/13/2013US20130146954 Method Of Memory Array And Structure Form
06/13/2013US20130146953 Method and Structure For Forming ETSOI Capacitors, Diodes, Resistors and Back Gate Contacts
06/13/2013US20130146952 On-chip capacitors in combination with cmos devices on extremely thin semiconductor on insulator (etsoi) substrates
06/13/2013US20130146950 Semiconductor device and manufacturing method thereof
06/13/2013US20130146949 Mechanisms for forming stressor regions in a semiconductor device
06/13/2013US20130146947 SELF-ALIGNED EMITTER-BASE IN ADVANCED BiCMOS TECHNOLOGY
06/13/2013US20130146944 Semiconductor device including stepped gate electrode and fabrication method thereof
06/13/2013US20130146943 In situ grown gate dielectric and field plate dielectric
06/13/2013US20130146939 Silicone adhesive for semiconductor element
06/13/2013US20130146896 Semiconductor optical device having an air media layer and the method for forming the air media layer thereof
06/13/2013US20130146895 Pinch-off control of gate edge dislocation
06/13/2013US20130146894 Bipolar junction transistor structure for reduced current crowding
06/13/2013US20130146889 Compound semiconductor device and manufacturing method of the same
06/13/2013US20130146886 Vertical GaN JFET with Gate Source Electrodes on Regrown Gate
06/13/2013US20130146885 Vertical GaN-Based Metal Insulator Semiconductor FET
06/13/2013US20130146883 Semiconductor thin film, thin film transistor, method for manufacturing same, and manufacturing equipment of semiconductor thin film
06/13/2013US20130146875 Split electrode for organic devices
06/13/2013US20130146874 Semiconductor integrated circuit
06/13/2013US20130146872 Semiconductor Device and Method of Forming Conductive Pillars Having Recesses or Protrusions to Detect Interconnect Continuity Between Semiconductor Die and Substrate
06/13/2013US20130146865 High-sensitivity transparent gas sensor and method for manufacturing the same
06/13/2013US20130146864 Thin film transistor display panel and manufacturing method thereof
06/13/2013US20130146863 High quality gan high-voltage hfets on silicon
06/13/2013US20130146862 Array substrate including thin film transistor and method of fabricating the same