Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
07/2004
07/29/2004WO2004064159A1 Semiconductor device, three-dimensional mounting semiconductor apparatus, method for manufacturing semiconductor device
07/29/2004WO2004064156A1 Laminate made by electro-forming and method for manufacturing the same
07/29/2004WO2004064155A1 Electro-forming master having a pin portion and the same master-manufacturing method, and metal minute pattern made by the master
07/29/2004WO2004064153A1 Semiconductor device and method of manufacturing the same
07/29/2004WO2004064152A2 Modular construction component with encapsulation
07/29/2004WO2004064150A1 Method for manufacturing electronic component mount board and electronic mount board manufactured by this method
07/29/2004WO2004064149A1 Magnetic memory device
07/29/2004WO2004064148A1 High performance embedded dram technology with strained silicon
07/29/2004WO2004064147A2 Integration of ald/cvd barriers with porous low k materials
07/29/2004WO2004064146A1 Method for making a stressed structure designed to be dissociated
07/29/2004WO2004064145A1 Method of producing soi wafer and soi wafer
07/29/2004WO2004064144A2 Semiconductor packaging with a partially prepatterned lead frame and method of manufacturing the same
07/29/2004WO2004064143A1 Method of microelectrode connection and connected structure of use threof
07/29/2004WO2004064142A1 Semiconductor device and process for producing the same
07/29/2004WO2004064141A1 Jointing method for electronic components, and jointing device used for the method
07/29/2004WO2004064140A1 Module with encapsulation
07/29/2004WO2004064139A2 Semiconductor chip stack and method for passivating a semiconductor chip stack
07/29/2004WO2004064138A1 Die bonding device
07/29/2004WO2004064137A1 Method for producing a silicon-on-insulator structure
07/29/2004WO2004064136A1 A method of improving stability in low k barrier layers
07/29/2004WO2004064135A1 Composite shape electroforming member, its electroforming master and method for manufacturing the same
07/29/2004WO2004064134A1 Substrate treatment system, substrate treatment device, program, and recording medium
07/29/2004WO2004064133A1 Crystallized semiconductor thin film manufacturing method and its manufacturing apparatus
07/29/2004WO2004064132A1 Method of producing a complex structure by assembling stressed structures
07/29/2004WO2004064131A2 Method for the epitaxial deposition of layers
07/29/2004WO2004064130A1 SiGe STRAIN RELAXED BUFFER FOR HIGH MOBILITY DEVICES AND A METHOD OF FABRICATING IT
07/29/2004WO2004064129A1 Substrate processing method and substrate processing apparatus
07/29/2004WO2004064126A1 Charge particle exposure method, complementarily divided mask used for it, and semiconductor device produced by using the method
07/29/2004WO2004064125A1 Gas feed line structure
07/29/2004WO2004064124A1 Chip transfer method and apparatus
07/29/2004WO2004064123A2 Method for the production of a semiconductor component
07/29/2004WO2004064122A1 Installation for processing a substrate
07/29/2004WO2004064121A2 A supercritical fluid cleaning system and method
07/29/2004WO2004064097A2 Charged particle beam device for inspecting or structuring a specimen
07/29/2004WO2004064018A1 Separating method and method for manufacturing display device using the separating method
07/29/2004WO2004063815A2 Method and system for fabricating nanoscale patterns in light curable compositions using an electric field
07/29/2004WO2004063805A1 Pixel structure and thin film transistor array
07/29/2004WO2004063804A1 Pixel structure
07/29/2004WO2004063799A1 Method for manufacturing the thin film transistor array
07/29/2004WO2004063774A2 Optical monitoring of thin film deposition
07/29/2004WO2004063756A1 Method and apparatus for detecting an unused state in a semiconductor circuit
07/29/2004WO2004063698A2 System for detection of wafer defects
07/29/2004WO2004063422A2 Method for curing low dielectric constant film using direct current bias
07/29/2004WO2004063418A1 Member of apparatus for plasma treatment, member of treating apparatus, apparatus for plasma treatment, treating apparatus and method of plasma treatment
07/29/2004WO2004063417A2 Method to improve cracking thresholds and mechanical properties of low-k dielectric material
07/29/2004WO2004063301A1 Composition and method used for chemical mechanical planarization of metals
07/29/2004WO2004063028A2 Wafer shipping container
07/29/2004WO2004062341A2 Method and apparatus for layer by layer deposition of thin films
07/29/2004WO2004044980A3 Hermetically encapsulated component and waferscale method for the production thereof
07/29/2004WO2004044660A3 Probability constrained optimization for electrical fabrication control
07/29/2004WO2004038798A3 Stacked electronic structures including offset substrates
07/29/2004WO2004034478A3 Layer arrangement of hetero-connected semiconductor layers, comprising at least one intermediate separation layer, and method for the production thereof
07/29/2004WO2004034468A3 Flash memory array with increased coupling between floating and control gates
07/29/2004WO2004034442A3 Method for semiconductor gate width reduction
07/29/2004WO2004032183A3 Method for making a detachable semiconductor substrate and for obtaining a semiconductor element
07/29/2004WO2004030052A3 Method and apparatus for drying semiconductor wafer surfaces using a plurality of inlets and outlets held in close proximity to the wafer surfaces
07/29/2004WO2004027460A3 Replication and transfer of microstructures and nanostructures
07/29/2004WO2004027411A8 System and method for metal residue detection and mapping within a multi-step sequence
07/29/2004WO2004025709A3 Method for fabricating an ohmic contact in a semiconductor device
07/29/2004WO2004021463A3 Buffer layers for organic electroluminescent devices and methods of manufacture and use
07/29/2004WO2004021414A3 Integrated circuit arrangements, in particular capacitor arrangements and corresponding production method
07/29/2004WO2004021361A3 Eeprom comprising a non-volatile register which is integrated into the memory area thereof
07/29/2004WO2004012207A3 Optical device for high energy radiation
07/29/2004WO2004011258A3 Method of forming and repairing a lithographic template having a gap defect
07/29/2004WO2004008244A3 Defect inspection methods that include acquiring aerial images of a reticle for different lithographic process variables
07/29/2004WO2004001798A3 A silicon-on-insulator device with strained device film and method for making the same with partial replacement of isolation oxide
07/29/2004WO2003096385A3 Silicon-on-insulator structures and methods
07/29/2004WO2003074601A3 Printing of organic conductive polymers containing additives
07/29/2004WO2003073356A8 Memory module assembly using partially defective chips
07/29/2004US20040148578 Method and system for design selection by interactive visualization
07/29/2004US20040148123 Semiconductor device having a test circuit for testing an output circuit
07/29/2004US20040148120 Method and apparatus for monitoring integrated circuit fabrication
07/29/2004US20040147736 Activated polyethylene glycol compounds
07/29/2004US20040147710 Fluorinated aromatic polymer and use thereof
07/29/2004US20040147420 Cleaning compositions containing hydroxylamine derivatives and processes using same for residue removal
07/29/2004US20040147206 CMP abrasive, liquid additive for CMP abrasive and method for polishing substrate
07/29/2004US20040147204 Thin-film structure processing device
07/29/2004US20040147139 Rapid energy transfer annealing device and process
07/29/2004US20040147138 Method for forming metal-containing films using metal complexes with chelating o- and/or n-donor ligands
07/29/2004US20040147137 Method for fabricating semiconductor devices
07/29/2004US20040147136 Method for making the gate dielectric layer by oxygen radicals and hydroxyl radicals mixture
07/29/2004US20040147135 Method of fabricating shallow trench isolation structure
07/29/2004US20040147134 Method for manufacturing semiconductor laser optical device
07/29/2004US20040147133 Method for reducing the contact resistance
07/29/2004US20040147131 Plasma processing apparatus and plasma processing method
07/29/2004US20040147130 Etching aftertreatment method
07/29/2004US20040147129 Methods of masking and etching a semiconductor substrate, and ion implant lithography methods of processing a semiconductor substrate
07/29/2004US20040147128 Method for forming patterned features at a semiconductor wafer periphery to prevent metal peeling
07/29/2004US20040147127 Fabrication method of semiconductor integrated circuit device
07/29/2004US20040147126 Dry etching method, fabrication method for semiconductor device, and dry etching apparatus
07/29/2004US20040147125 Stencil mask and its manufacturing method
07/29/2004US20040147123 Chemical mechanical polishing slurry for ruthenium titanium nitride and polishing process using the same
07/29/2004US20040147122 Wafer processing apparatus having dust proof function
07/29/2004US20040147121 Method and system for manufacturing a semiconductor device
07/29/2004US20040147120 Process for the back-surface grinding of wafers
07/29/2004US20040147119 Method for producing a solid body including a microstructure
07/29/2004US20040147118 Selective barrier metal polishing solution
07/29/2004US20040147117 Protection of low-k ILD during damascene processing with thin liner
07/29/2004US20040147116 Novel method to reduce stress for copper CMP
07/29/2004US20040147115 Two-step formation of etch stop layer