Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
08/2004
08/05/2004WO2004066345A2 Doped semiconductor nanocrystal layers and preparation thereof
08/05/2004WO2004066308A1 Magnetic memory device, write current driver circuit, and write current driving method
08/05/2004WO2004066307A2 Stacked memory cell having diffusion barriers
08/05/2004WO2004066027A2 Electron beam processing for mask repair
08/05/2004WO2004065972A1 Laser beam inspection equipment
08/05/2004WO2004065934A2 Semiconductor fabrication method for making small features
08/05/2004WO2004065664A1 Plating device and plating method
08/05/2004WO2004065658A1 Method and apparatus for removing material from chamber and wafer surfaces by high temperature hydrogen-containing plasma
08/05/2004WO2004065657A1 Methods of making carbon nanotube films, layers, fabrics, ribbons, elements and articles
08/05/2004WO2004065654A1 Component for film forming device and method of washing the component
08/05/2004WO2004065510A1 Pressure sensitive adhesive sheet, method of protecting semiconductor wafer surface and method of processing work
08/05/2004WO2004065027A1 Iced film substrate cleaning
08/05/2004WO2004051370A8 Transfer mask blank, transfer mask, and transfer method using the transfer mask
08/05/2004WO2004049438A3 Method for producing a calibration wafer
08/05/2004WO2004049393A3 Annealing process of semiconductor wafer and device thereof
08/05/2004WO2004048783A3 High-pressure device for closing a container
08/05/2004WO2004042800A3 Semiconductor arrangement
08/05/2004WO2004038757A3 Transistor structures and methods for making the same
08/05/2004WO2004037866A3 Photoresists containing sulfonamide component
08/05/2004WO2004033197A3 Support for substrates and compound comprising a support substrate and an extremely thin substrate
08/05/2004WO2004032144A3 Spacer integration scheme in mram technology
08/05/2004WO2004021405B1 Method and system for dynamic modeling and recipe optimization of semiconductor etch processes
08/05/2004WO2004013867A3 An optical device for directing x-rays having a plurality of optical crystals
08/05/2004WO2004007318A3 Loadport apparatus and method for use thereof
08/05/2004WO2004001802A3 Nrom memory cell, memory array, related devices and methods
08/05/2004WO2003107451A3 Electrodes for optoelectronic components and the use thereof
08/05/2004WO2003094209A3 Use of conductive electrolessly deposided etch stop layers, liner layers and via plugs in interconnect structures
08/05/2004WO2003085727A3 Semiconductor chip comprising a protective layer and a corresponding production method
08/05/2004WO2002029137A3 Method and associated apparatus for tilting a substrate upon entry for metal deposition
08/05/2004WO2000065653A9 A method in the fabrication of organic thin-film semiconducting devices
08/05/2004US20040153989 Pattern writing method capable of preventing or reducing an error between design dimensions and finished dimensions of a pattern
08/05/2004US20040153986 Semiconductor circuit device and circuit simulation method for the same
08/05/2004US20040153978 Cost-effective scan architecture and a test application scheme for scan testing with non-scan test power and test application cost
08/05/2004US20040153920 Semiconductor test system having multitasking algorithmic pattern generator
08/05/2004US20040153916 Apparatus and method for testing integrated circuits using weighted pseudo-random test patterns
08/05/2004US20040153806 Technique for testability of semiconductor integrated circuit
08/05/2004US20040153801 Semiconductor integrated circuit and method for testing same
08/05/2004US20040153795 Analog voltage output driver LSI chip having test circuit
08/05/2004US20040153752 Self-reparable semiconductor and method thereof
08/05/2004US20040153581 Integrated circuit and information signal processing apparatus
08/05/2004US20040153282 Device and method for substrate displacement detection
08/05/2004US20040153279 Method and apparatus for monitoring integrated circuit fabrication
08/05/2004US20040153275 Novel test structure for detecting bridging of DRAM capacitors
08/05/2004US20040153271 System and method of monitoring, predicting and optimizing production yields in a liquid crystal display (LCD) manufacturing process
08/05/2004US20040153183 System and method of monitoring, predicting and optimizing production yields in a liquid crystal display (LCD) manufacturing process
08/05/2004US20040153182 System and method of monitoring, predicting and optimizing production yields in a liquid crystal display (LCD) manufacturing process
08/05/2004US20040153181 System and method of monitoring, predicting and optimizing production yields in a liquid crystal display (LCD) manufacturing process
08/05/2004US20040153180 System and method of monitoring, predicting and optimizing production yields in a liquid crystal display (LCD) manufacturing process
08/05/2004US20040153179 System and method of monitoring, predicting and optimizing production yields in a liquid crystal display (LCD) manufacturing process
08/05/2004US20040152860 Positive resist composition and base material carrying layer of the positive resist composition
08/05/2004US20040152608 Ammonia-free alkaline microelectronic cleaning compositions with improved substrate compatibility
08/05/2004US20040152582 Hot plate, electrostatic chuck, wafer prober, susceptors; measurement accuracy with a thermoviewer
08/05/2004US20040152403 Retaining ring with flange for chemical mechanical polishing
08/05/2004US20040152402 Wafer polishing with counteraction of centrifugal forces on polishing slurry
08/05/2004US20040152401 Arrangement of a chemical-mechanical polishing tool and method of chemical-mechanical polishing using such a chemical-mechanical polishing tool
08/05/2004US20040152400 Polishing apparatus
08/05/2004US20040152397 Method of planarizing a semiconductor die
08/05/2004US20040152348 Socket for mating with electronic component, particularly semiconductor device with spring packaging, for fixturing, testing, burning-in or operating such a component
08/05/2004US20040152344 Metal/insulator/metal (MIM) structure prevents leakage current; metal wire is electrically connected to electrode; edge area at which a side surface and a bottom of the via hole intersect is positioned on a top surface of side wall
08/05/2004US20040152343 Method of manufacturing semiconductor device
08/05/2004US20040152342 Method of eliminating residual carbon from flowable oxide fill
08/05/2004US20040152341 HDP-CVD deposition process for filling high aspect ratio gaps
08/05/2004US20040152340 Semiconductor integrated circuit device and method for manufacturing the same
08/05/2004US20040152339 Method of fabricating semiconductor device
08/05/2004US20040152338 Method for depositing a low dielectric constant film
08/05/2004US20040152337 Manufacturing method of semiconductor device
08/05/2004US20040152336 Semiconductor device and its manufacturing method
08/05/2004US20040152335 Method of manufacturing semiconductor device
08/05/2004US20040152334 Organic insulating film, manufacturing method thereof, semiconductor device using such organic insulating film and manufacturing method thereof
08/05/2004US20040152333 Dielectric barrier layer for a copper metallization layer having a varying silicon concentration along its thickness
08/05/2004US20040152332 Method for patterning dielectric layers on semiconductor substrates
08/05/2004US20040152331 Process for etching polysilicon gates with good mask selectivity, critical dimension control, and cleanliness
08/05/2004US20040152330 Tunneling barrier for a copper damascene via
08/05/2004US20040152329 Method for manufacturing semiconductor electronic devices
08/05/2004US20040152328 Bi-level resist structure and fabrication method for contact holes on semiconductor substrates
08/05/2004US20040152327 Method of fabricating semiconductor device
08/05/2004US20040152326 Multicrystalline silicon substrate and process for roughening surface thereof
08/05/2004US20040152325 Chemical mechanical polishing method, and washing/rinsing method associated therewith
08/05/2004US20040152324 Technique for forming contacts for buried doped regions in a semiconductor device
08/05/2004US20040152323 Liquid film layer is provided between the photosensitive resist layer and a photomask containing a light shielding film with an opening portion, the resist layer is exposed with near field light through opening and liquid film layer
08/05/2004US20040152322 Method of purging wafer receiving jig, wafer transfer device, and method of manufacturing semiconductor device
08/05/2004US20040152321 Pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on sapphire substrates, and gallium nitride semiconductor structures fabricated thereby
08/05/2004US20040152320 Method for manufacturing liquid crystal display
08/05/2004US20040152319 Processing apparatus for processing substrate by process solution
08/05/2004US20040152318 Semiconductor device manufacturing method
08/05/2004US20040152317 Method and structures for increasing the structure density and the storage capacitance in a semiconductor wafer
08/05/2004US20040152316 Method of manufacturing semiconductor device
08/05/2004US20040152315 Apparatus and method for manufacturing a semiconductor
08/05/2004US20040152314 Wafer handling checker
08/05/2004US20040152313 Low species buffered rinsing fluids and methods
08/05/2004US20040152312 Method for depositing a material on a substrate wafer
08/05/2004US20040152311 Method and apparatus for adjusting the thickness of a thin layer of semiconductor material
08/05/2004US20040152310 Signal improvement in eddy current sensing
08/05/2004US20040152309 Method of polishing a silicon-containing dielectric
08/05/2004US20040152308 heating a rare earth carboxylates with alkoxyalcoholst to form solutions, then adding a silicon alkoxide and activators, mixing with water to form gels and thermal decomposition under slightly reductive atmosphere, to form rare earth element-activated rare earth silicate phosphors
08/05/2004US20040152307 Integrated circuit structure with copper interconnect
08/05/2004US20040152306 Semiconductor device manufacturing method for improving adhesivity of copper metal layer to barrier layer
08/05/2004US20040152305 Method for preventing corrosion of tungsten plug
08/05/2004US20040152304 Insitu post atomic layer deposition destruction of active species
08/05/2004US20040152303 Copper bath composition for electroless and/or electrolytic filling of vias and trenches for integrated circuit fabrication