Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
08/2004
08/10/2004US6774398 Thin film transistor array panel having a means for visual inspection
08/10/2004US6774397 Semiconductor device
08/10/2004US6774394 Inline detection device for self-aligned contact defects
08/10/2004US6774390 Semiconductor device
08/10/2004US6774389 Optical semiconductor device
08/10/2004US6774380 Variably shaped beam EB writing system
08/10/2004US6774379 Electron beam exposure apparatus and deflection amount correction method
08/10/2004US6774376 Distal portion having head coupled to flange with wafer-receiving groove between to engage wafer edge and cylindrical in shape; pin made of silicon or graphite
08/10/2004US6774374 Isolation mounts for use with vacuum chambers and their application in lithographic projection apparatuses
08/10/2004US6774373 Adjustable implantation angle workpiece support structure for an ion beam implanter
08/10/2004US6774372 Electron-optical lens arrangement with an axis that can be largely displaced
08/10/2004US6774365 SEM inspection and analysis of patterned photoresist features
08/10/2004US6774363 Method of preventing charging, and apparatus for charged particle beam using the same
08/10/2004US6774327 Hermetic seals for electronic components
08/10/2004US6774314 Electronic device and coupler
08/10/2004US6774306 Microelectronic connections with liquid conductive elements
08/10/2004US6774258 Useful as monomer to form polymer which serves as a base resin in chemically amplified resist
08/10/2004US6774097 Resist stripper composition
08/10/2004US6774061 Nanocrystalline silicon quantum dots within an oxide layer
08/10/2004US6774060 Methods and apparatus for thermally processing wafers
08/10/2004US6774059 High crack resistance nitride process
08/10/2004US6774058 Chemical treatment of semiconductor substrates
08/10/2004US6774057 Method and structure for forming dielectric layers having reduced dielectric constants
08/10/2004US6774056 Sonic immersion process system and methods
08/10/2004US6774055 In-line system having overlay accuracy measurement function and method for the same
08/10/2004US6774054 High temperature annealing of spin coated Pr1-xCaxMnO3 thim film for RRAM application
08/10/2004US6774053 Method and structure for low-k dielectric constant applications
08/10/2004US6774052 Method of making nanotube permeable base transistor
08/10/2004US6774051 Method for reducing pitch
08/10/2004US6774050 Doped aluminum oxide dielectrics
08/10/2004US6774049 Electroless deposition of doped noble metals and noble metal alloys
08/10/2004US6774048 Method of manufacturing a semiconductor device
08/10/2004US6774047 Method of manufacturing a semiconductor integrated circuit device
08/10/2004US6774046 Method for minimizing the critical dimension growth of a feature on a semiconductor wafer
08/10/2004US6774045 Residual halogen reduction with microwave stripper
08/10/2004US6774044 Reducing photoresist shrinkage via plasma treatment
08/10/2004US6774043 Method of manufacturing semiconductor device
08/10/2004US6774042 Planarization method for deep sub micron shallow trench isolation process
08/10/2004US6774041 Polishing method, metallization fabrication method, method for manufacturing semiconductor device and semiconductor device
08/10/2004US6774040 Apparatus and method for surface finishing a silicon film
08/10/2004US6774039 Process scheme for improving electroplating performance in integrated circuit manufacture
08/10/2004US6774038 Organometal complex and method of depositing a metal silicate thin layer using same
08/10/2004US6774037 Method integrating polymeric interlayer dielectric in integrated circuits
08/10/2004US6774036 Integrated circuit trenched features and method of producing same
08/10/2004US6774035 Thermal processing of metal alloys for an improved CMP process in integrated circuit fabrication
08/10/2004US6774033 Metal stack for local interconnect layer
08/10/2004US6774032 Method of making a semiconductor device by forming a masking layer with a tapered etch profile
08/10/2004US6774031 Method of forming dual-damascene structure
08/10/2004US6774030 Method and system for improving the manufacturing of metal damascene structures
08/10/2004US6774029 Method for forming a conductive film and a conductive pattern of a semiconductor device
08/10/2004US6774028 Method of forming wiring structure by using photo resist having optimum development rate
08/10/2004US6774027 Semiconductor device and method for manufacturing the same
08/10/2004US6774026 Structure and method for low-stress concentration solder bumps
08/10/2004US6774025 Method for producing group III nitride compound semiconductor light-emitting element
08/10/2004US6774024 Semiconductor integrated circuit device having multilevel interconnection
08/10/2004US6774023 Method of manufacturing a semiconductor device having a multilayer structure including a dual-layer silicide
08/10/2004US6774022 Method of passivating an oxide surface subjected to a conductive material anneal
08/10/2004US6774021 Pattern forming method and pattern forming device
08/10/2004US6774020 Semiconductor device and method of manufacturing the same
08/10/2004US6774017 Method and structures for dual depth oxygen layers in silicon-on-insulator processes
08/10/2004US6774016 Silicon-on-insulator (SOI) substrate and method for manufacturing the same
08/10/2004US6774015 Strained silicon-on-insulator (SSOI) and method to form the same
08/10/2004US6774014 Method of fabricating spherical quantum dots device by combination of gas condensation and epitaxial technique
08/10/2004US6774013 N-type boron-carbide semiconductor polytype and method of fabricating the same
08/10/2004US6774012 Furnace system and method for selectively oxidizing a sidewall surface of a gate conductor by oxidizing a silicon sidewall in lieu of a refractory metal sidewall
08/10/2004US6774011 Chip pickup device and method of manufacturing semiconductor device
08/10/2004US6774010 Transferable device-containing layer for silicon-on-insulator applications
08/10/2004US6774008 Method for fabricating shallow trench isolation between deep trench capacitors
08/10/2004US6774007 Method of fabricating shallow trench isolation
08/10/2004US6774006 Microelectronic device fabricating method, and method of forming a pair of field effect transistor gate lines of different base widths from a common deposited conductive layer
08/10/2004US6774005 Method for fabricating a metal carbide layer and method for fabricating a trench capacitor containing a metal carbide
08/10/2004US6774004 Nano-scale resistance cross-point memory array
08/10/2004US6774002 Structure and method for forming self-aligned bipolar junction transistor with expitaxy base
08/10/2004US6774001 Self-aligned gate and method
08/10/2004US6774000 Method of manufacture of MOSFET device with in-situ doped, raised source and drain structures
08/10/2004US6773999 Method for treating thick and thin gate insulating film with nitrogen plasma
08/10/2004US6773998 Modified film stack and patterning strategy for stress compensation and prevention of pattern distortion in amorphous carbon gate patterning
08/10/2004US6773996 Forming impurity zones
08/10/2004US6773995 Double diffused MOS transistor and method for manufacturing same
08/10/2004US6773994 CMOS vertical replacement gate (VRG) transistors
08/10/2004US6773993 Method for manufacturing a self-aligned split-gate flash memory cell
08/10/2004US6773992 Method for fabricating nonvolatile-semiconductor memory device
08/10/2004US6773991 Method of fabricating EEPROM having tunnel window area
08/10/2004US6773990 Method for reducing short channel effects in memory cells and related structure
08/10/2004US6773989 Self aligned method of forming a semiconductor memory array of floating gate memory cells with control gate protruding portions
08/10/2004US6773988 Memory wordline spacer
08/10/2004US6773987 Method and apparatus for reducing charge loss in a nonvolatile memory cell
08/10/2004US6773986 Method for fabricating a semiconductor memory device
08/10/2004US6773985 Method for forming DRAM cell
08/10/2004US6773984 Methods of depositing noble metals and methods of forming capacitor constructions
08/10/2004US6773983 Memory cell arrangement and method for its fabrication
08/10/2004US6773982 Feram cell with internal oxygen source and method of oxygen release
08/10/2004US6773981 Methods of forming capacitors
08/10/2004US6773980 Methods of forming a field emission device
08/10/2004US6773979 Method for fabricating semiconductor device
08/10/2004US6773978 Methods for improved metal gate fabrication
08/10/2004US6773977 Method of forming a diode for integration with a semiconductor device and method of forming a transistor device having an integrated diode
08/10/2004US6773976 Semiconductor device and method for manufacturing the same
08/10/2004US6773975 Formation of a shallow trench isolation structure in integrated circuits
08/10/2004US6773974 Method of forming a semiconductor array of floating gate memory cells and strap regions