| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 09/08/2005 | US20050194616 Transistor and method of forming the same |
| 09/08/2005 | US20050194615 Organic thin-film transistor and method for manufacturing the same |
| 09/08/2005 | US20050194614 Integrated semiconductor memory and method for electrically stressing an integrated semiconductor memory |
| 09/08/2005 | US20050194613 Field effect transistor |
| 09/08/2005 | US20050194612 III-Nitride current control device and method of manufacture |
| 09/08/2005 | US20050194606 Transferring semiconductor crystal from a substrate to a resin |
| 09/08/2005 | US20050194602 Method for fabricating a non-planar nitride-based heterostructure field effect transistor |
| 09/08/2005 | US20050194597 Transistors of semiconductor device having channel region in a channel-portion hole and methods of forming the same |
| 09/08/2005 | US20050194596 Increasing carrier mobility in NFET and PFET transistors on a common wafer |
| 09/08/2005 | US20050194595 Semiconductor device and method of manufacturing the same |
| 09/08/2005 | US20050194594 Projection TV |
| 09/08/2005 | US20050194593 Structure and method for fabricating GaN devices utilizing the formation of a compliant substrate |
| 09/08/2005 | US20050194591 Semiconductor devices and manufacturing method therefor |
| 09/08/2005 | US20050194590 System and method for controlling manufacturing apparatuses |
| 09/08/2005 | US20050194589 Dual panel-type organic electroluminescent display device and method of fabricating the same |
| 09/08/2005 | US20050194585 Field effect transistor and a method for manufacturing the same |
| 09/08/2005 | US20050194565 Polishing compound, its production process and polishing method |
| 09/08/2005 | US20050194564 Remove titanium thin film formed on a semiconductor wafer; acidic aqueous solution of sodium fluoride, trivalent titanium or divalent iron ions, copper corrosion inhibitor; high etching rate for titanium while suppressing corrosion of solder alloy, tin |
| 09/08/2005 | US20050194563 Selective for removal of copper in relation to tantalum and dielectric materials whilst minimizing local dishing and erosion effects |
| 09/08/2005 | US20050194562 Varying weight ratio of thermoplastic polymer to polyvinylpyrrolidone controls removal rate; complexing agent, corrosion inhibitor, oxidizing agent, silica abrasive; prevent dishing of the low-k dielectric layer; does not recognize tuning of the slurry |
| 09/08/2005 | US20050194549 Work piece transfer system for an ion beam implanter |
| 09/08/2005 | US20050194545 [adjustable collimator and sputtering apparatus with the same] |
| 09/08/2005 | US20050194535 Sample surface inspection method and inspection system |
| 09/08/2005 | US20050194534 Method of operating a probe microscope |
| 09/08/2005 | US20050194475 Inductively coupled plasma chemical vapor deposition apparatus |
| 09/08/2005 | US20050194427 X-ray alignment system for fabricating electronic chips |
| 09/08/2005 | US20050194423 Ultrasonic bonding apparatus and method |
| 09/08/2005 | US20050194422 Bump bonding apparatus and bump bonding method |
| 09/08/2005 | US20050194361 Neutral beam source having electromagnet used for etching semiconductor device |
| 09/08/2005 | US20050194358 Alumina abrasive for chemical mechanical polishing |
| 09/08/2005 | US20050194357 useful for polishing tantalum barrier material and copper from semiconductor wafer, comprising by weight percent 0.1 to 30 oxidizer, 0.01 to 3 inorganic salt or acid, 0.01 to 4 inhibitor, 0.1 to 30 abrasive, 0 to 15 complexing agent, balance water |
| 09/08/2005 | US20050194356 Removing photoresist from a workpiece using water and ozone and a photoresist penetrating additive |
| 09/08/2005 | US20050194355 Method for adjusting voltage on a powered faraday shield |
| 09/08/2005 | US20050194354 Plasma processing method and plasma processing device |
| 09/08/2005 | US20050194350 Capacitor and inductor scheme with e-fuse application |
| 09/08/2005 | US20050194349 Method of fabricating film carrier |
| 09/08/2005 | US20050194258 Electrochemical fabrication methods incorporating dielectric materials and/or using dielectric substrates |
| 09/08/2005 | US20050194248 Apparatus and methods for electrochemical processing of microelectronic workpieces |
| 09/08/2005 | US20050194180 Compliant contact pin assembly, card system and methods thereof |
| 09/08/2005 | US20050194121 Device for the creation of containment barriers for cold air in atmospheric conditions corresponding to radiation frosts |
| 09/08/2005 | US20050194100 Reduced friction lift pin |
| 09/08/2005 | US20050194097 Plasma processing apparatus and method of designing the same |
| 09/08/2005 | US20050194096 Method and apparatus for semiconductor processing |
| 09/08/2005 | US20050194094 Window type probe, plasma monitoring device, and plasma processing device |
| 09/08/2005 | US20050194093 Plasma processing apparatus |
| 09/08/2005 | US20050194085 Method for producing ceramic multilayer substrate |
| 09/08/2005 | US20050193953 Plasma processing apparatus |
| 09/08/2005 | US20050193952 Substrate support system for reduced autodoping and backside deposition |
| 09/08/2005 | US20050193949 Method for manufacturing integrated circuits and corresponding device |
| 09/08/2005 | US20050193948 Vacuum processing apparatus |
| 09/08/2005 | US20050193944 Printing apparatus and device manufacturing method |
| 09/08/2005 | US20050193943 Substrate treatment method and substrate treatment apparatus |
| 09/08/2005 | US20050193942 Method for making substrate wafers for low-defect semiconductor components, obtained thereby and uses thereof |
| 09/08/2005 | US20050193800 Porous gas sensors and method of preparation thereof |
| 09/08/2005 | US20050193550 Fast production of high aspect ratio magnetic structures on write heads using combination of chemical mechanical polishing (CMP) and reactive ion etching (RIE); dimension control and definition |
| 09/08/2005 | US20050193537 Modular semiconductor workpiece processing tool |
| 09/08/2005 | DE4242843B4 Verfahren zur Herstellung von aus mehreren Keramikschichten aufgebauten Elektronikkomponenten A process for the production of ceramic layers composed of several electronic components |
| 09/08/2005 | DE202005007894U1 Thin, plate shaped article e.g. silicon wafer, breaking device, has support mat with oval, semicircle or wedge shaped clearance recess below scratching line of article, where recess extends in moving direction of breaking stamp |
| 09/08/2005 | DE19748823B4 Servicefreundliche Kontaktiervorrichtung Service friendly contactor |
| 09/08/2005 | DE19709926B4 EEPROM Flash-Zelle und Verfahren zu deren Herstellung Flash EEPROM cell and methods for their preparation |
| 09/08/2005 | DE19704289B4 Integrierte Halbleiterschaltung, die separat zu Eingangsschaltungen geführte Netzleitungen hat und Schaltungseinheit damit A semiconductor integrated circuit, the input circuits separately to run power lines and switching unit has thus |
| 09/08/2005 | DE10393441T5 Verfahren zum Beibehalten der Lötmitteldicke bei Flip-Chip-Befestigungspackaging-Verfahren A method for maintaining the solder thickness at the flip-chip mounting packaging method |
| 09/08/2005 | DE10358721B3 Method of manufacturing cobalt silicide contacts on semiconductor material in contact holes where the cobalt in the silicon form an alloy esp. for a field of memory cells |
| 09/08/2005 | DE10228441B4 Verfahren und Vorrichtung zum automatischen Beladen einer Doppelseiten-Poliermaschine mit Halbleiterscheiben Method and apparatus for automatically loading a double-side polishing machine with semiconductor wafers |
| 09/08/2005 | DE102005006153A1 Manufacture of field effect transistor comprises forming bridge-shaped third active region from upper surface of lower substrate layer and connecting first and second active regions formed from upper substrate layer |
| 09/08/2005 | DE102005004845A1 Wafer-Unterteilungsverfahren Wafer dividing method |
| 09/08/2005 | DE102005002526A1 Wärmeunterstützte Magnetspeichervorrichtung mit gesteuerter Temperatur Heat-assisted magnetic memory device with controlled temperature |
| 09/08/2005 | DE102005000644A1 Elektronenstrahlprüfvorrichtung und Verfahren zum Überprüfen von Durchgangsöffnungen unter Verwendung von geclusterten Nanoröhren-Arrays Elektronenstrahlprüfvorrichtung and method for checking of through holes using clustered nanotube arrays |
| 09/08/2005 | DE102004063624A1 Fabrication of split gate flash memory device involves forming gate insulating layer on exposed portion of substrate, and forming second gate overlapping one side of first gate in which split gate is configured with first and second gates |
| 09/08/2005 | DE102004063590A1 Formation of silicon quantum dot for semiconductor memory device, involves applying isotropic etching to substrate using barrier film as mask, and oxidizing isotropic etched substrate with thermal treatment to form gate oxide film |
| 09/08/2005 | DE102004063476A1 Mono-gate memory device e.g. flash memory has oxide-nitride-oxide layer and gate oxide layer formed adjacently on active area of substrate |
| 09/08/2005 | DE102004062969A1 Flash-Speichervorrichtung und Verfahren zu deren Programmieren und Löschen A flash memory device and method of programming and erasing |
| 09/08/2005 | DE102004062859A1 Copper interconnect oxidation preventing method in semiconductor device, involves etching nitride layer to expose portion of lower copper interconnect and supplying preset gas to exposed portion of lower copper interconnect |
| 09/08/2005 | DE102004062829A1 Fabrication of semiconductor device e.g. vertical transistor comprises forming channel ion implantation areas in substrate and forming second conductive type source/drain impurity ion areas in substrate corresponding to pillar |
| 09/08/2005 | DE102004061326A1 Integrierte Schaltung Integrated circuit |
| 09/08/2005 | DE102004060440A1 Formation of oxide film in semiconductor device, e.g. forming gate oxide film of transistor, by forming oxide film on silicon substrate by performing oxidation process, and performing high-temperature thermal treatment process |
| 09/08/2005 | DE102004059627A1 Halbleitervorrichtung Semiconductor device |
| 09/08/2005 | DE102004042798A1 IGBT-Baugruppe IGBT module |
| 09/08/2005 | DE102004040764A1 Verfahren zum Korrigieren von Verletzungen von Maskenregeln nach optischer Nachbarschaftskorrektur, maschinenlesbares Speichermedium und System A method for correcting violations of rules after optical proximity correction mask, machine-readable storage medium and system |
| 09/08/2005 | DE102004033646A1 Struktur und Verfahren zum Einbrenntesten für eine Packung Structure and method for burn-in testing for a pack |
| 09/08/2005 | DE102004031465A1 Wiring method for forming a re-wiring lead on a surface of an integrated circuit has a bare fuse element and a wiring area that can be cut through |
| 09/08/2005 | DE102004028714A1 Thermische Behandlungsvorrichtung Thermal treatment device |
| 09/08/2005 | DE102004020938B3 Primary contact hole is formed in a storage building block by forming a silicon dioxide cover layer on gate electrodes on a semiconductor surface, mask application and etching |
| 09/08/2005 | DE102004011394B3 Rapidly growing pores are formed in n-type silicon by applying seeds, etching using a weakly oxidising electrolyte, and primary seed nucleation |
| 09/08/2005 | DE102004008824A1 Glaskeramik mit geringer Wärmeausdehnung Glass ceramics with low thermal expansion |
| 09/08/2005 | DE102004008749A1 Verfahren zur Herstellung eines großvolumigen CaF2-Einkristalles mit geringer Streuung und verbesserter Laserstabilität, sowie ein solcher Kristall und dessen Verwendung A method for producing a large volume of CaF2 single crystal with low scattering and improved laser stability, as well as such a crystal and its use |
| 09/08/2005 | DE102004008497A1 Herstellungsverfahren für eine Halbleiterstruktur in einem Substrat, wobei die Halbleiterstruktur mindestens zwei unterschiedlich zu strukturierende Bereiche aufweist Manufacturing method of a semiconductor structure in a substrate, wherein the semiconductor structure comprises at least two different areas to be patterned comprises |
| 09/08/2005 | DE102004008474A1 Diffraction pattern suppression method for use in association with the optical inspection of semiconductor wafers, whereby a matched suppression pattern is temporarily created in an optical fashion using a light sensitive layer |
| 09/08/2005 | DE102004008289A1 Roboterführungseinheit zur Bereitstellung einer Präzisionsbewegung eines Gegenstands Robot control unit for providing a precision movement of an object |
| 09/08/2005 | DE102004008245B3 Integrierter Halbleiterspeicher und Verfahren zum elektrischen Stressen eines integrierten Halbleiterspeichers Integrated semiconductor memory and method for electrically stressing a semiconductor integrated circuit memory |
| 09/08/2005 | DE102004008065A1 Verfahren zur Integration von kolloidal erzeugten Nanopartikeln in epitaktischen Schichten Method for the integration of colloidal nanoparticles generated in epitaxial layers |
| 09/08/2005 | DE102004007813A1 Sputtervorrichtung mit einem Magnetron und einem Target A magnetron sputtering apparatus and a target |
| 09/08/2005 | DE102004007661A1 Verfahren zur Optimierung eines Layouts von Versorgungsleitungen A method for optimizing a layout of power supply lines |
| 09/08/2005 | DE102004007409A1 Semiconductor structure manufacturing method especially for deep trench memory circuits made with sub-100 nm technology, whereby doped silicon is deposited over the trench structure using on over-conforming separation method |
| 09/08/2005 | DE102004007186A1 Two-stage etching process to manufacture a semiconductor chip e.g. dynamic random access memory |
| 09/08/2005 | DE102004007167A1 Two-stage etching process to manufacture semiconductor device with sub-ground rule structure |
| 09/08/2005 | DE102004007009A1 Verfahren zur Herstellung eines Leistungsmoduls und Leistungsmodul A process for producing a power module and the power module |
| 09/08/2005 | DE102004006544B3 Verfahren zur Abscheidung eines leitfähigen Kohlenstoffmaterials auf einem Halbleiter zur Ausbildung eines Schottky-Kontaktes und Halbleiterkontaktvorrichtung A process for the deposition of a conductive carbon material on a semiconductor to form a Schottky contact and the semiconductor contact device |
| 09/08/2005 | DE102004006440A1 Fingertip sensor chip has exposed contact zone located within surrounding plastic frame |
| 09/08/2005 | DE102004006372A1 Transformation of positional information relating to structural elements in a pattern representing one or more levels of an integrated circuit between two different coordinate systems by use of a transformation step library |