Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
09/2005
09/15/2005US20050199598 Method and system for precisely positioning a waist of a material-processing laser beam to process microstructures within a laser-processing site
09/15/2005US20050199597 [laser annealing apparatus and laser annealing process]
09/15/2005US20050199596 Laser crystallization apparatus and laser crystallization method
09/15/2005US20050199592 Laser based splitting method, object to be split, and semiconductor element chip
09/15/2005US20050199589 Aminoacetic acid, oxidizer, and water
09/15/2005US20050199588 Fixed-abrasive chemical-mechanical planarization of titanium nitride
09/15/2005US20050199586 Resist removal method and semiconductor device manufactured by using the same
09/15/2005US20050199585 Method of depositing an amorphous carbon film for metal etch hardmask application
09/15/2005US20050199583 Electrochemical fabrication methods incorporating dielectric materials and/or using dielectric substrates
09/15/2005US20050199582 Method for forming fine grating
09/15/2005US20050199503 Single workpiece processing chamber
09/15/2005US20050199495 Chemical sensor using chemically induced electron-hole production at a schottky barrier
09/15/2005US20050199491 Shields usable with an inductively coupled plasma reactor
09/15/2005US20050199489 Electroless deposition apparatus
09/15/2005US20050199420 Circuit board and method for manufacturing the same
09/15/2005US20050199372 Cold plate and method of making the same
09/15/2005US20050199343 Plasma etching apparatus and plasma etching process
09/15/2005US20050199340 processing materials inside an atmospheric-pressure radiofrequency nonthermal plasma discharge
09/15/2005US20050199331 Method of fabricating multilayer ceramic substrate
09/15/2005US20050199330 Device and method for the application of a sheet-like jointing means onto a contact area of a wafer
09/15/2005US20050199277 Side-specific cleaning apparatus
09/15/2005US20050199264 CMP cleaning composition with microbial inhibitor
09/15/2005US20050199262 Method for ashing
09/15/2005US20050199187 Heat treatment apparatus and substrate processing apparatus
09/15/2005US20050199184 Gas distributor having directed gas flow and cleaning method
09/15/2005US20050199182 Apparatus for the preparation of film
09/15/2005US20050199078 Method and apparatus for determination of the depth of depressions which are formed in a mount substrate
09/15/2005US20050198913 cerium oxide as a core, coated with a coating layer of an inorganic silicon compound except hydroxide and an inorganic aluminum compound except hydroxide; for polishing glass
09/15/2005US20050198912 Polishing slurry, method of producing same, and method of polishing substrate
09/15/2005US20050198857 Apparatus and method for removing organic contamination adsorbed onto substrate, and apparatus and method for measuring thickness of thin film formed on substrate
09/15/2005US20050198847 Parallel ruler
09/15/2005US20050198844 Stage apparatus
09/15/2005US20050198799 Die ejector system using linear motor
09/15/2005DE4402270B4 Feldeffekttransistoranordnung mit Schottky-Elektrode Field effect transistor device with Schottky electrode
09/15/2005DE19957614B4 Verfahren zum Handhaben eines IC-Bausteins A method for managing an IC package
09/15/2005DE19931149B4 Optoelektronische integrierte Schaltvorrichtung Opto-electronic integrated circuit device
09/15/2005DE19813653B4 Anwenderprogrammierbares Verknüpfungsfeld A field programmable gate array
09/15/2005DE19640811B4 Verfahren zum Untersuchen von Prozessdefekten bei Halbleitervorrichtungen A method of inspecting of process defects in semiconductor devices
09/15/2005DE10393700T5 Halbleiteranordnung und Verfahren zu deren Herstellung A semiconductor device and process for their preparation
09/15/2005DE10393690T5 III-V Halbleiter und Verfahren zur seiner Herstellung III-V semiconductors and methods for its preparation
09/15/2005DE10393430T5 Verfahren zur Korrektur eines Maskenmusters A method for correcting a mask pattern
09/15/2005DE10393364T5 Lochmikrosonde unter Nutzung einer MEMS-Technik und ein Verfahren zur Herstellung derselben Hollow microprobe using an MEMS technique and a method of manufacturing the same
09/15/2005DE10392855T5 Solarelektrizitätszelle mit Nanoarchitektur/-Anordnung Solar Electricity cell with Nano Architecture / arrangement
09/15/2005DE10353585B4 Unidirektionale Eingangsschaltanordnung, Halbleiterschaltung und Verfahren zur Prüfung einer Laufzeitverzögerung eines Eingangstreibers einer Halbleiterschaltung Unidirectional input circuitry, semiconductor circuit and method for testing a propagation delay of an input driver of a semiconductor circuit
09/15/2005DE10345186A1 Verfahren zur Herstellung eines Metall-Oxid-Halbleiter Feldeffekttransistors und Metall-Oxid-Halbleiter Feldeffekttransistor A method for producing a metal-oxide-semiconductor field-effect transistor and metal oxide semiconductor field effect transistor
09/15/2005DE10208774B4 Verfahren zur Herstellung einer Speicherzelle A method for fabricating a memory cell
09/15/2005DE102005009027A1 Schaltkreissystem für eine elektronische Batteriesteuereinheit Circuit system for a battery electronic control unit
09/15/2005DE102005007112A1 Beschichtungsbehandlungsvorrichtung und Beschichtungsbehandlungsverfahren Coating treatment apparatus and coating treatment method
09/15/2005DE102005004827A1 Wafer-Unterteilungsverfahren Wafer dividing method
09/15/2005DE102005001165A1 Werkstückausrichtungsvorrichtung Workpiece alignment device
09/15/2005DE102004062956A1 Fabrication of static random access memory device comprises forming two conductor patterns on cell area of substrate and third conductor pattern in periphery area, and forming third spacer on sidewall of third conductor pattern
09/15/2005DE102004059400A1 System und Verfahren zum Verwenden eines seitenbefestigten Interferometers, um Positionsinformationen zu erfassen System and method for using a side mounted interferometer to detect position information
09/15/2005DE102004058431A1 Semiconductor electronic chip trench system with two nitride materials linked by an interface with an electrical contact channel
09/15/2005DE102004014214B3 Gluing system for fastening transponder chip to substrate uses thick layer of electrically conducting glue with matrix loaded with conducting particles forming bridges between electrodes
09/15/2005DE102004010691A1 Net based grouping method e.g. for standard cells in place and route for DRAM semiconductor chip, involves having network list with two standard cells automatically combined of standard cells out of two standard cells
09/15/2005DE102004009521A1 Hochvolt-PMOS-Transistor High voltage PMOS transistor
09/15/2005DE102004009397A1 Process to make electronic interconnecting element with a further layer that is a non-conductive, structure and easily removable
09/15/2005DE102004009087A1 Setting breakdown voltage of thyristor, by introducing p-doped particles to produce p-doped calibration zone in n-doped base
09/15/2005DE102004008784B3 Verfahren zur Durchkontaktierung von Feldeffekttransistoren mit einer selbstorganisierten Monolage einer organischen Verbindung als Gatedielektrikum A method for through-contacting of field effect transistors with a self-assembled monolayer of an organic compound as the gate dielectric
09/15/2005DE102004008598A1 Verfahren für den Betrieb einer Inline-Beschichtungsanlage A method of operating an in-line coating line
09/15/2005DE102004008442A1 Siliciumverbindungen für die Erzeugung von SIO2-haltigen Isolierschichten auf Chips Silicon compounds for the production of SiO2-containing insulating layers on chips
09/15/2005DE102004007333A1 Tray conveyor for conveying a transport tray on which semiconductor devices are arranged during manufacture having a sensor to detect the tray and gripping plates
09/15/2005DE102004005948A1 MOS-Transistor und Verfahren zur Herstellung eines MOS-Transistorstruktur MOS transistor and method of manufacturing a MOS transistor structure
09/15/2005DE10139430B4 Verfahren zur Ausbildung von Isolationsgräben zwischen aktiven Gebieten bei der Herstellung integrierter Schaltungen A method of forming isolation trenches between active regions during the fabrication of integrated circuits
09/14/2005EP1575168A2 Semiconductor device
09/14/2005EP1575098A1 Integrated capacitor
09/14/2005EP1575097A2 Semiconductor device with heterojunction
09/14/2005EP1575096A1 Semiconductor material for electronic device and semiconductor element using same
09/14/2005EP1575095A1 Semiconductor material having bipolar transistor structure and semiconductor device using same
09/14/2005EP1575094A1 Bipolar transistor
09/14/2005EP1575093A2 Semiconductor device and method for manufacturing the same
09/14/2005EP1575091A2 Semiconductor integrated circuit
09/14/2005EP1575089A1 Highly reliable, cost effective and thermally enhanced AuSn die-attach technology
09/14/2005EP1575088A1 Magnetic memory device
09/14/2005EP1575087A2 Semiconductor wafer processing to increase the usable planar surface area
09/14/2005EP1575086A2 Semiconductor device and manufacturing method of the same, including a dicing step
09/14/2005EP1575085A2 Thin film device supply body and method of fabricating tha same and its use in a transfer method
09/14/2005EP1575084A2 Method for depositing a solder material on a substrate
09/14/2005EP1575083A2 Method of manufacturing a semiconductor device and semiconductor device obtainable with such a method
09/14/2005EP1575082A2 Method for formimg a self-aligned germanide structure
09/14/2005EP1575081A1 Expansion method and device
09/14/2005EP1575056A1 Non-volatile memory and write method thereof
09/14/2005EP1575055A1 Cmis semiconductor nonvolatile storage circuit
09/14/2005EP1575054A2 Magnetic shield member, magnetic shield structure, and magnetic memory device
09/14/2005EP1574977A1 Integrated circuit design system, method and program
09/14/2005EP1574906A2 Aligning apparatus, exposure apparatus, and device manufacturing method
09/14/2005EP1574905A1 Lithographic apparatus and device manufacturing method
09/14/2005EP1574903A1 Photoresists comprising cyanoadamantyl moiety-containing polymers
09/14/2005EP1574902A1 Method of pattern formation using ultrahigh heat resistant positive photosensitive composition
09/14/2005EP1574901A1 Process for producing photoresist composition, filter, coater and photoresist composition
09/14/2005EP1574867A1 Semiconductor device and method for testing the same
09/14/2005EP1574866A1 Inspection method and inspection equipment
09/14/2005EP1574816A1 Method and apparatus for the geometrical characterization of structures
09/14/2005EP1574600A1 Cup type plating equipment
09/14/2005EP1574597A1 Apparatus and process for producing thin films and devices
09/14/2005EP1574289A2 Carrier for holding an object to be polished
09/14/2005EP1573871A2 Methods of forming semiconductor devices having self aligned semiconductor mesas and contact layers and related devices
09/14/2005EP1573870A2 Methods of forming semiconductor devices including mesa structures and multiple passivation layers and related devices
09/14/2005EP1573827A2 Electronic devices including semiconductor mesa structures and conductivity junctions and methods of forming said devices
09/14/2005EP1573824A1 Vertical insulated gate transistor and manufacturing method