Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
09/2005
09/13/2005US6943366 Substrate for semiconductor light-emitting element, semiconductor light-emitting element and semiconductor light-emitting element fabrication method
09/13/2005US6943364 Multi-functioned wafer aligner
09/13/2005US6943359 Structured organic materials and devices using low-energy particle beams
09/13/2005US6943350 Methods and apparatus for electron beam inspection of samples
09/13/2005US6943142 Etching aftertreatment; removal photoresists; aqueous mixture of water soluble solvent and sulfonate
09/13/2005US6943139 Removal of particle contamination on patterned silicon/silicon dioxide using supercritical carbon dioxide/chemical formulations
09/13/2005US6943129 Interconnection structure and method for designing the same
09/13/2005US6943128 Method for reducing semiconductor resistance, device for reducing semiconductor resistance and semiconductor element
09/13/2005US6943127 CVD plasma assisted lower dielectric constant SICOH film
09/13/2005US6943126 Deuterium incorporated nitride
09/13/2005US6943125 Method for manufacturing semiconductor device
09/13/2005US6943124 Two step exposure to strengthen structure of polyimide or negative tone photosensitive material
09/13/2005US6943122 Vacuum processing system for producing components
09/13/2005US6943121 Selectively converted inter-layer dielectric
09/13/2005US6943120 Method to improve via or contact hole profile using an in-situ polymer deposition and strip procedure
09/13/2005US6943119 Flash process for stacking poly etching
09/13/2005US6943118 Method of fabricating flash memory
09/13/2005US6943117 UV nanoimprint lithography process using elementwise embossed stamp and selectively additive pressurization
09/13/2005US6943116 Method for fabricating a p-channel field-effect transistor on a semiconductor substrate
09/13/2005US6943115 Semiconductor device and method of manufacture thereof
09/13/2005US6943114 Integration scheme for metal gap fill, with fixed abrasive CMP
09/13/2005US6943113 Metal chemical polishing process for minimizing dishing during semiconductor wafer fabrication
09/13/2005US6943112 Defect-free thin and planar film processing
09/13/2005US6943111 Barrier free copper interconnect by multi-layer copper seed
09/13/2005US6943110 Wafer processing apparatus and methods for depositing cobalt silicide
09/13/2005US6943109 Method of manufacturing a semiconductor element
09/13/2005US6943107 Methods of forming a refractory metal silicide
09/13/2005US6943106 Methods of fabricating interconnects for semiconductor components including plating solder-wetting material and solder filling
09/13/2005US6943105 Soft metal conductor and method of making
09/13/2005US6943104 Method of etching insulating film and method of forming interconnection layer
09/13/2005US6943103 Methods for reducing flip chip stress
09/13/2005US6943102 Solder bump transfer sheet, method for producing the same, and methods for fabricating semiconductor device and printed board
09/13/2005US6943101 Manufacturing of a corrosion protected interconnect on a substrate
09/13/2005US6943099 Method for manufacturing gate structure with sides of its metal layer partially removed
09/13/2005US6943098 Method of forming semiconductor device with non-conformal liner layer that is thinner on sidewall surfaces
09/13/2005US6943097 Atomic layer deposition of metallic contacts, gates and diffusion barriers
09/13/2005US6943096 Semiconductor component and method of manufacture
09/13/2005US6943095 Low defect density (Ga, A1, In) N and HVPE process for making same
09/13/2005US6943094 Method for attaching semiconductor components to a substrate using component attach system having radiation exposure assembly
09/13/2005US6943092 Methods of manufacturing semiconductor devices
09/13/2005US6943091 Sequential deposition process for gap filling
09/13/2005US6943089 Semiconductor device manufacturing method and semiconductor manufacturing apparatus
09/13/2005US6943088 Method of manufacturing a trench isolation structure for a semiconductor device with a different degree of corner rounding
09/13/2005US6943087 Semiconductor on insulator MOSFET having strained silicon channel
09/13/2005US6943086 Laser annealing apparatus, TFT device and annealing method of the same
09/13/2005US6943085 Method of manufacturing metal-oxide-semiconductor transistor
09/13/2005US6943084 Semiconductor device on silicon-on-insulator and method for manufacturing the semiconductor device
09/13/2005US6943083 Merged MOS-bipolar capacitor memory cell
09/13/2005US6943082 Method for manufacturing a nonvolatile memory device
09/13/2005US6943081 Method of forming storage nodes comprising a base in a contact hole and related structures
09/13/2005US6943080 Method of manufacturing the semiconductor device
09/13/2005US6943079 Semiconductor devices and methods for manufacturing the same
09/13/2005US6943078 Method and structure for reducing leakage current in capacitors
09/13/2005US6943077 Selective spacer layer deposition method for forming spacers with different widths
09/13/2005US6943076 Semiconductor device and method of manufacturing the same
09/13/2005US6943075 Method for manufacturing flash memory device
09/13/2005US6943074 Nonvolatile semiconductor memory device having a two-layer gate structure and method for manufacturing the same
09/13/2005US6943073 Process for low temperature atomic layer deposition of RH
09/13/2005US6943072 Adjustable threshold isolation transistor
09/13/2005US6943071 Integrated memory cell and method of fabrication
09/13/2005US6943070 Complementary metal oxide semiconductor image sensor and method of manufacturing the same
09/13/2005US6943069 Power system inhibit method and device and structure therefor
09/13/2005US6943068 Method for fabricating nanometer gate in semiconductor device using thermally reflowed resist technology
09/13/2005US6943067 Three-dimensional integrated semiconductor devices
09/13/2005US6943066 Active matrix backplane for controlling controlled elements and method of manufacture thereof
09/13/2005US6943062 Contaminant particle removal by optical tweezers
09/13/2005US6943061 Method of fabricating semiconductor chip package using screen printing of epoxy on wafer
09/13/2005US6943060 Method for fabricating integrated circuit package with solder bumps
09/13/2005US6943059 Flip chip mounting method of forming a solder bump on a chip pad that is exposed through an opening formed in a polyimide film that includes utilizing underfill to bond the chip to a substrate
09/13/2005US6943058 No-flow underfill process and material therefor
09/13/2005US6943057 Multichip module package and fabrication method
09/13/2005US6943056 Semiconductor device manufacturing method and electronic equipment using same
09/13/2005US6943055 Method and apparatus for detecting backside contamination during fabrication of a semiconductor wafer
09/13/2005US6943054 Attachment of organic molecules to group III, IV or V substrates
09/13/2005US6943053 System, method and medium for modeling, monitoring and/or controlling plasma based semiconductor manufacturing processes
09/13/2005US6943052 Method of manufacturing display apparatus
09/13/2005US6943051 Method of fabricating heterojunction photodiodes integrated with CMOS
09/13/2005US6943050 Method for making semiconductor device, semiconductor element composite, electro-optical apparatus, and electronic system
09/13/2005US6943049 Method for making a reflective liquid crystal display device
09/13/2005US6943048 Method for manufacturing optoelectronic material
09/13/2005US6943047 Device transferring method, device arraying method, and image display fabrication method using the same
09/13/2005US6943045 Semiconductor wafer protective device and semiconductor wafer treatment method
09/13/2005US6943044 Method of high speed data rate testing
09/13/2005US6943043 Surface contamination analyzer for semiconductor wafers, method used therein and process for fabricating semiconductor device
09/13/2005US6943042 Method of detecting spatially correlated variations in a parameter of an integrated circuit die
09/13/2005US6943039 Method of etching ferroelectric layers
09/13/2005US6943038 Method for fabricating a flux concentrating system for use in a magnetoelectronics device
09/13/2005US6942921 Nanotube films and articles
09/13/2005US6942918 Mesoporous films having reduced dielectric constants
09/13/2005US6942892 Hot element CVD apparatus and a method for removing a deposited film
09/13/2005US6942891 analyzing the gas components of various types exhausted during a semiconductor manufacturing process
09/13/2005US6942833 Ceramic multilayer substrate manufacturing method and unfired composite multilayer body
09/13/2005US6942816 Methods of reducing photoresist distortion while etching in a plasma processing system
09/13/2005US6942813 Method of etching magnetic and ferroelectric materials using a pulsed bias source
09/13/2005US6942780 Method and apparatus for processing a substrate with minimal edge exclusion
09/13/2005US6942764 reducing contamination due to deposited particulate matter on a single wafer sputter-etchers by coating the full interior of the sputtering shield with a layer of an arc-sprayed material such as aluminum, the layer has a high degree of roughness
09/13/2005US6942750 Low-temperature patterned wafer bonding with photosensitive benzocyclobutene (BCB) and 3D MEMS (microelectromechanical systems) structure fabrication
09/13/2005US6942738 automated semiconducted wafer processing systems, used for processing semiconductor wafers, hard disk media, semiconductor substrates, optical materials, and similar materials requiring very low levels of contamination
09/13/2005US6942737 Substrate cleaning apparatus and method
09/13/2005US6942732 Method for forming double density wordline
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