Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
09/2005
09/29/2005WO2005090043A1 Method and device for forming recessed and projected pattern
09/29/2005WO2005090032A1 Process for producing ceramic sheet, ceramic substrate utilizing the same and use thereof
09/29/2005WO2005090011A1 Vacuum suction unit
09/29/2005WO2005090001A1 Liquid supplying apparatus, polishing apparatus and semiconductor device manufacturing method
09/29/2005WO2005089955A1 Chemical liquid feeder
09/29/2005WO2005089510A2 Method of forming one or more base structures on an ltcc cofired module
09/29/2005WO2005089484A2 Integrated circuit metal silicide method
09/29/2005WO2005089440A2 Multiple dielectric finfet structure and method
09/29/2005WO2005089330A2 Technique and apparatus for depositing thin layers of semiconductors for solar cell fabricaton
09/29/2005WO2005089184A2 Method of magnetic field assisted self-assembly
09/29/2005WO2005089165A2 Nano-enabled memory devices and anisotropic charge carrying arrays
09/29/2005WO2005057629A3 Assembly and adhesive layer for semiconductor components
09/29/2005WO2005055324A3 Bipolar transistor with raised base connector region and method for production thereof
09/29/2005WO2005036567A8 Stand-alone organic-based passive devices
09/29/2005WO2005034200A3 Adjustable self-aligned air gap dielectric for low capacitance wiring
09/29/2005WO2005031805A3 Multi-surface ic packaging structures and methods for their manufacture
09/29/2005WO2005022661A3 Correcting potential defects in an oled device
09/29/2005WO2005004204A3 An electrochemical method and resulting structures for attaching molecular and biomolecular structures to semiconductor micro and nanostructures
09/29/2005WO2004108982A3 Adaptable processing element for a processing system and a method of making the same
09/29/2005WO2004100253A3 Electronic component as well as system support and panel for the production thereof
09/29/2005WO2004090339A3 Method and apparatus for rotation of a workpiece in supercritical fluid solutions for removing photo resist, residues and particles therefrom
09/29/2005WO2004080889A3 Crystalline membranes
09/29/2005WO2004048783A8 High-pressure device for closing a container
09/29/2005WO2004033574A8 Cmp method utilizing amphiphilic non-ionic surfactants
09/29/2005WO2004027835A3 Advanced microelectronic connector assembly and method of manufacturing
09/29/2005WO2004027810A3 System and method for removal of materials from an article
09/29/2005US20050216803 Integrated circuit device
09/29/2005US20050216228 Method and system for correcting a fault in a semiconductor manufacturing system
09/29/2005US20050216115 Transport management system and method thereorf
09/29/2005US20050216113 Fabrication monitoring system
09/29/2005US20050216104 Method for estimating at least one component placement position on a substrate as well as a device for carrying out such a method
09/29/2005US20050215732 Composition for film formation, coating solution containing the same and electronic device having insulating film obtained by using the coating solution
09/29/2005US20050215713 Method of producing a crosslinked coating in the manufacture of integrated circuits
09/29/2005US20050215446 Mixture of fluorine compound, amine compound and chelate compound in aqueous solution; semiconductor wafer cleaning compound
09/29/2005US20050215445 comprises a nonwoven three-dimensional layer comprising an open, lofty web of crimped synthetic fibers that are adhesively bonded substantially at points of mutual contact with a binder material, the binder material comprising a plurality of abrasive particles
09/29/2005US20050215415 For a semiconductor production and/or inspection apparatus; the average concentration of free carbon in the work mounting portion is different from the average concentration of free carbon in the base layer
09/29/2005US20050215188 CMP pad conditioner having working surface inclined in radially outer portion
09/29/2005US20050215183 Chemical-mechanical planarization composition having PVNO and associated method for use
09/29/2005US20050215180 Semiconductor device fabrication method
09/29/2005US20050215177 CMC porous pad with component-filled pores
09/29/2005US20050215086 Sheet-form connector and production method and application therefor
09/29/2005US20050215078 Scribing sapphire substrates with a solid state UV laser
09/29/2005US20050215077 Method for manufacturing a polycrystalline semiconductor film, apparatus thereof, and image display panel
09/29/2005US20050215074 ONO formation method
09/29/2005US20050215073 Wafer supporting member
09/29/2005US20050215072 Method and system for treating a dielectric film
09/29/2005US20050215071 Method of preparing a silicon dioxide layer by high temperature oxidation on a substrate having, at least on the surface, germanium or a silicon-germanium alloy
09/29/2005US20050215070 Method for forming silicon dioxide film on silicon substrate, method for forming oxide film on semiconductor substrate, and method for producing semiconductor device
09/29/2005US20050215069 Methods for preserving strained semiconductor substrate layers during CMOS processing
09/29/2005US20050215067 Combination insulator and organic semiconductor formed from self-assembling block co-polymers
09/29/2005US20050215066 High density plasma process for the formation of silicon dioxide on silicon carbide substrates
09/29/2005US20050215065 Low dielectric constant porous films
09/29/2005US20050215064 Methods of cleaning surfaces of copper-containing materials, and methods of forming openings to copper-containing substrates
09/29/2005US20050215063 System and methods for etching a silicon wafer using HF and ozone
09/29/2005US20050215062 Method of manufacturing semiconductor device
09/29/2005US20050215061 Method and composite hard mask for forming deep trenches in a semiconductor substrate
09/29/2005US20050215060 Polishing composition and polishing method
09/29/2005US20050215059 Process for producing semi-conductor coated substrate
09/29/2005US20050215058 Methods of forming channels on an integrated circuit die and die cooling systems including such channels
09/29/2005US20050215057 Arsenic dopants for pulling of silicon single crystal, process for producing thereof and process for producing silicon single crystal using thereof
09/29/2005US20050215056 Bonded wafer processing method
09/29/2005US20050215055 Semiconductor device having a fully silicided gate electrode and method of manufacture therefor
09/29/2005US20050215054 Feed-through process and amplifier with feed-through
09/29/2005US20050215053 Process for producing integrated circuits
09/29/2005US20050215052 Integrated treatment method for obtaining robust low dielectric constant materials
09/29/2005US20050215051 Two step trench definition procedure for formation of a dual damascene opening in a stack of insulator layers
09/29/2005US20050215050 Hydrogen plasma photoresist strip and polymeric residue cleanup process for low dielectric constant materials
09/29/2005US20050215049 Semiconductor device and method of manufacturing the same
09/29/2005US20050215048 Structure and method for contact pads having an overcoat-protected bondable metal plug over copper-metallized integrated circuits
09/29/2005US20050215047 Method of manufacturing a semiconductor device having damascene structures with air gaps
09/29/2005US20050215046 Electrochemical fabrication methods incorporating dielectric materials and/or using dielectric substrates
09/29/2005US20050215045 Methods of forming bumps using barrier layers as etch masks and related structures
09/29/2005US20050215044 Method for forming photoresist layer on subsrtate and bumping process using the same
09/29/2005US20050215043 Low fabrication cost, high performance, high reliability chip scale package
09/29/2005US20050215042 Metallization and its use in, in particular, an IGBT or a diode
09/29/2005US20050215041 Low temperature, long term annealing of nickel contacts to lower interfacial resistance
09/29/2005US20050215040 Quantum wire gate device and method of making same
09/29/2005US20050215039 Method and apparatus for self-aligned MOS patterning
09/29/2005US20050215038 Method for using a wet etch to manufacturing a semiconductor device having a silicided gate electrode and a method for manufacturing an integrated circuit including the same
09/29/2005US20050215037 Method for manufacturing a semiconductor device having a silicided gate electrode and a method for manufacturing an integrated circuit including the same
09/29/2005US20050215036 Method for forming a doping superlattice using a laser
09/29/2005US20050215035 Field effect transistor with metal oxide gate insulator and sidewall insulating film
09/29/2005US20050215034 Reduction of native oxide at germanium interface using hydrogen-based plasma
09/29/2005US20050215033 Method of dicing semiconductor wafer into chips, and apparatus using this method
09/29/2005US20050215032 Dicing film having shrinkage release film and method of manufacturing semiconductor package using the same
09/29/2005US20050215031 Photo-semiconductor device and method of manufacturing the same
09/29/2005US20050215030 Method and device for separating a reinforcing-plate fixed to a reinforced semiconductor wafer
09/29/2005US20050215029 Method for fixing wafer used in manufacturing procedure
09/29/2005US20050215028 Method of wafer/substrate bonding
09/29/2005US20050215027 Trench semiconductor device having gate oxide layer with multiple thicknesses and processes of fabricating the same
09/29/2005US20050215026 Method for producing semiconductor device
09/29/2005US20050215025 Micro pipe manufacturing method
09/29/2005US20050215024 Methods for forming super-steep diffusion region profiles in MOS devices and resulting semiconductor topographies
09/29/2005US20050215023 Electrochemical fabrication process for forming multilayer multimaterial microprobe structures
09/29/2005US20050215022 Tri-gate low power device and method for manufacturing the same
09/29/2005US20050215021 Method of manufacturing a bipolar transistor with a single-crystal base contact
09/29/2005US20050215019 Method of manufacturing metal-oxide-semiconductor transistor
09/29/2005US20050215018 Reduction of channel hot carrier effects in transistor devices
09/29/2005US20050215017 Method for reducing a short channel effect for NMOS devices in SOI circuits
09/29/2005US20050215016 Method of fabricating a three-dimensional MOSFET employing a hard mask spacer