Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
09/2005
09/27/2005US6949830 Silicon oxycarbide, growth method of silicon oxycarbide layer, semiconductor device and manufacture method for semiconductor device
09/27/2005US6949829 Semiconductor device and fabrication method therefor
09/27/2005US6949828 Wiring structure having integral wiring portion and plug portion and method of forming the same
09/27/2005US6949827 Electrical and elelctronic apparatus having thin films on the substrates formed by atomic layer deposition
09/27/2005US6949825 Laminates for encapsulating devices
09/27/2005US6949822 Semiconductor multichip module package with improved thermal performance; reduced size and improved moisture resistance
09/27/2005US6949821 Semiconductor package
09/27/2005US6949815 Semiconductor device with decoupling capacitors mounted on conductors
09/27/2005US6949814 Mounting material, semiconductor device and method of manufacturing semiconductor device
09/27/2005US6949812 Method for manufacturing a high frequency semiconductor structure and high frequency semiconductor structure
09/27/2005US6949811 Device having interdigital capacitor
09/27/2005US6949806 Electrostatic discharge protection structure for deep sub-micron gate oxide
09/27/2005US6949805 Semiconductor device having low interface state density and method for fabricating the same
09/27/2005US6949804 Semiconductor device with gate dielectric film having an oxide film and an oxynitride film
09/27/2005US6949803 Manufacturing process for a high voltage transistor integrated on a semiconductor substrate with non-volatile memory cells and corresponding transistor
09/27/2005US6949802 ESD protection structure
09/27/2005US6949801 Dual trench isolation using single critical lithographic patterning
09/27/2005US6949798 Semiconductor device
09/27/2005US6949797 Semiconductor structure comprising a magnetoresistor
09/27/2005US6949796 Halo implant in semiconductor structures
09/27/2005US6949795 Structure and method of fabricating a transistor having a trench gate
09/27/2005US6949794 Non-volatile semiconductor memory device in which selection gate transistors and memory cells have different structures
09/27/2005US6949793 Memory device with quantum dot and method for manufacturing the same
09/27/2005US6949792 Stacked gate region of a memory cell in a memory device
09/27/2005US6949791 Flash cell with trench source-line connection
09/27/2005US6949790 Semiconductor device and its manufacturing method
09/27/2005US6949789 Use of dilute steam ambient for improvement of flash devices
09/27/2005US6949788 Nonvolatile semiconductor memory device and method for operating the same
09/27/2005US6949787 Transistor having high dielectric constant gate insulating layer and source and drain forming Schottky contact with substrate
09/27/2005US6949786 Semiconductor device including capacitor
09/27/2005US6949785 Random access memory (RAM) capacitor in shallow trench isolation with improved electrical isolation to overlying gate electrodes
09/27/2005US6949784 Zero-cost non-volatile memory cell with write and erase features
09/27/2005US6949783 Memory cell transistor having different source/drain junction profiles connected to DC node and BC node and manufacturing method thereof
09/27/2005US6949782 Semiconductor memories
09/27/2005US6949779 Magnetoresistive element and magnetic memory
09/27/2005US6949777 Method of controlling insulated gate transistor
09/27/2005US6949776 Heterojunction bipolar transistor with dielectric assisted planarized contacts and method for fabricating
09/27/2005US6949775 Semiconductor device having a guard ring
09/27/2005US6949773 GaN LED for flip-chip bonding and method of fabricating the same
09/27/2005US6949768 Planar substrate devices integrated with finfets and method of manufacture
09/27/2005US6949767 Semiconductor device
09/27/2005US6949766 Method of deforming a pattern and semiconductor device formed by utilizing deformed pattern
09/27/2005US6949764 Fully-depleted-collector silicon-on-insulator (SOI) bipolar transistor useful alone or in SOI BiCMOS
09/27/2005US6949761 Structure for and method of fabricating a high-mobility field-effect transistor
09/27/2005US6949755 Position detection apparatus, position detection method, exposure apparatus, device manufacturing method, and substrate
09/27/2005US6949752 Electron beam apparatus and high-voltage discharge prevention method
09/27/2005US6949751 Slit lens arrangement for particle beams
09/27/2005US6949726 Heating apparatus having electrostatic adsorption function
09/27/2005US6949722 Method and apparatus for active temperature control of susceptors
09/27/2005US6949719 Thermal insulator having a honeycomb structure and heat recycle system using the thermal insulator
09/27/2005US6949618 Polyimide with three-dimensional structure and therefore are excellent in mechanical strength and heat resistance as compared with convntional linear polyimides; obtained from a salt of multifunctional amine
09/27/2005US6949482 Method for improving transistor performance through reducing the salicide interface resistance
09/27/2005US6949481 Process for fabrication of spacer layer with reduced hydrogen content in semiconductor device
09/27/2005US6949480 Method for depositing silicon nitride layer of semiconductor device
09/27/2005US6949479 Methods of forming transistor devices
09/27/2005US6949478 Oxide film forming method
09/27/2005US6949477 Method of fabricating a capacitive element for a semiconductor device
09/27/2005US6949475 Methods to reduce stress on a metal interconnect
09/27/2005US6949474 Method of manufacturing a semiconductor device and a semiconductor manufacture system
09/27/2005US6949472 Method for high kinetic energy plasma barrier deposition
09/27/2005US6949471 Method for fabricating poly patterns
09/27/2005US6949470 Method for manufacturing circuit devices
09/27/2005US6949469 Methods and apparatus for the optimization of photo resist etching in a plasma processing system
09/27/2005US6949467 Forming method of contact in semiconductor device and manufacturing method of PMOS device using the same
09/27/2005US6949466 CMP apparatus and method for polishing multiple semiconductor wafers on a single polishing pad using multiple slurry delivery lines
09/27/2005US6949465 Preparation process for semiconductor device
09/27/2005US6949464 Contact/via force fill techniques
09/27/2005US6949463 Method of making iron silicide and method of making photoelectric transducer
09/27/2005US6949462 Measuring an alignment target with multiple polarization states
09/27/2005US6949461 Method for depositing a metal layer on a semiconductor interconnect structure
09/27/2005US6949460 Line edge roughness reduction for trench etch
09/27/2005US6949459 Method of patterning damascene structure in integrated circuit design
09/27/2005US6949458 Self-aligned contact areas for sidewall image transfer formed conductors
09/27/2005US6949457 Barrier enhancement
09/27/2005US6949456 Method for manufacturing semiconductor device having porous structure with air-gaps
09/27/2005US6949455 Method for forming a semiconductor device structure a semiconductor layer
09/27/2005US6949454 Guard ring structure for a Schottky diode
09/27/2005US6949452 Method for fabricating image display device
09/27/2005US6949451 SOI chip with recess-resistant buried insulator and method of manufacturing the same
09/27/2005US6949450 Method for integrated in-situ cleaning and subsequent atomic layer deposition within a single processing chamber
09/27/2005US6949449 Method of forming a scribe line on a ceramic substrate
09/27/2005US6949448 Local oxidation of silicon (LOCOS) method employing graded oxidation mask
09/27/2005US6949447 Method for fabricating isolation layer in semiconductor device
09/27/2005US6949446 Method of shallow trench isolation formation and planarization
09/27/2005US6949445 Method of forming angled implant for trench isolation
09/27/2005US6949444 High-frequency line
09/27/2005US6949443 High performance semiconductor devices fabricated with strain-induced processes and methods for making same
09/27/2005US6949442 Methods of forming MIM capacitors
09/27/2005US6949441 Ferroelectric memory device and method of making the same
09/27/2005US6949440 Method of forming a varactor
09/27/2005US6949439 Semiconductor power component and a method of producing same
09/27/2005US6949438 Method of fabricating a bipolar junction transistor
09/27/2005US6949437 Manufacturing method of semiconductor device including an anisotropic etching step
09/27/2005US6949436 Composite spacer liner for improved transistor performance
09/27/2005US6949435 Asymmetric-area memory cell
09/27/2005US6949434 Method of manufacturing a vertical semiconductor device
09/27/2005US6949433 Method of formation of semiconductor resistant to hot carrier injection stress
09/27/2005US6949432 Trench DMOS transistor structure having a low resistance path to a drain contact located on an upper surface
09/27/2005US6949431 Method for fabricating cylinder type capacitor
09/27/2005US6949430 Semiconductor processing methods
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