Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2006
05/23/2006US7049245 Two-step GC etch for GC profile and process window improvement
05/23/2006US7049244 Method for enhancing silicon dioxide to silicon nitride selectivity
05/23/2006US7049243 Surface processing method of a specimen and surface processing apparatus of the specimen
05/23/2006US7049242 Post high voltage gate dielectric pattern plasma surface treatment
05/23/2006US7049241 Method for forming a trench in a layer or a layer stack on a semiconductor wafer
05/23/2006US7049240 Formation method of SiGe HBT
05/23/2006US7049239 STI structure and fabricating methods thereof
05/23/2006US7049238 Method for fabricating semiconductor device having recess
05/23/2006US7049237 Methods for planarization of Group VIII metal-containing surfaces using oxidizing gases
05/23/2006US7049236 Method of manufacturing a semiconductor device
05/23/2006US7049235 Method of manufacturing semiconductor device
05/23/2006US7049234 Multiple stage electroless deposition of a metal layer
05/23/2006US7049233 Apparatus and method for manufacturing thin film electrode of hydrous ruthenium oxide
05/23/2006US7049232 Methods for forming ruthenium films with β-diketone containing ruthenium complexes and method for manufacturing metal-insulator-metal capacitor using the same
05/23/2006US7049231 Methods of forming capacitors
05/23/2006US7049230 Method of forming a contact plug in a semiconductor device
05/23/2006US7049229 Method of fabricating semiconductor device and semiconductor device
05/23/2006US7049228 Method for introducing structures which have different dimensions into a substrate
05/23/2006US7049227 Method for alloying a wiring portion for a image display device
05/23/2006US7049226 Integration of ALD tantalum nitride for copper metallization
05/23/2006US7049225 Method for manufacturing vias between conductive patterns utilizing etching mask patterns formed on the conductive patterns
05/23/2006US7049224 Manufacturing method of electronic components embedded substrate
05/23/2006US7049223 Paste including a mixture of powders, connection plug, burying method, and semiconductor device manufacturing method
05/23/2006US7049222 Semiconductor device having silicide film formed in a part of source-drain diffusion layers and method of manufacturing the same
05/23/2006US7049221 Method for manufacturing a semiconductor device having a multilayer interconnection structure
05/23/2006US7049220 Method of forming cavity between multilayered wirings
05/23/2006US7049219 Coating of copper and silver air bridge structures to improve electromigration resistance and other applications
05/23/2006US7049218 Method of fabricating local interconnection using selective epitaxial growth
05/23/2006US7049217 Method of forming multi-piled bump
05/23/2006US7049216 Methods of providing solder structures for out plane connections
05/23/2006US7049215 Thin film transistor array panel and fabricating method thereof
05/23/2006US7049214 Method of manufacturing a semiconductor device to provide improved adhesion between bonding pads and ball portions of electrical connectors
05/23/2006US7049213 Method for producing a contact substrate and corresponding contact substrate
05/23/2006US7049212 Method for producing III-IV group compound semiconductor layer, method for producing semiconductor light emitting element, and vapor phase growing apparatus
05/23/2006US7049211 In-situ-etch-assisted HDP deposition using SiF4
05/23/2006US7049210 Method of implanting a substrate and an ion implanter for performing the method
05/23/2006US7049209 De-fluorination of wafer surface and related structure
05/23/2006US7049208 Method of manufacturing of thin based substrate
05/23/2006US7049207 Isolating method and transferring method for semiconductor devices
05/23/2006US7049206 Device isolation for semiconductor devices
05/23/2006US7049205 Stacked capacitor and method for preparing the same
05/23/2006US7049204 High density metal capacitor using via etch stopping layer as field dielectric in dual-damascence interconnect process
05/23/2006US7049203 Semiconductor device having a capacitor and method of fabricating same
05/23/2006US7049202 Method of manufacturing semiconductor device
05/23/2006US7049201 Method and apparatus for a heterojunction bipolar transistor using self-aligned epitaxy
05/23/2006US7049200 Method for forming a low thermal budget spacer
05/23/2006US7049199 Method of ion implantation for achieving desired dopant concentration
05/23/2006US7049198 Semiconductor device and method for fabricating the same
05/23/2006US7049197 Method of manufacturing a semiconductor device
05/23/2006US7049196 Vertical gain cell and array for a dynamic random access memory and method for forming the same
05/23/2006US7049195 Methods of fabricating non-volatile memory devices
05/23/2006US7049194 Trench DMOS device with improved drain contact
05/23/2006US7049193 Maskless middle-of-line liner deposition
05/23/2006US7049192 Lanthanide oxide / hafnium oxide dielectrics
05/23/2006US7049191 Method for protecting against oxidation of a conductive layer in said device
05/23/2006US7049190 Method for forming ZnO film, method for forming ZnO semiconductor layer, method for fabricating semiconductor device, and semiconductor device
05/23/2006US7049189 Method of fabricating non-volatile memory cell adapted for integration of devices and for multiple read/write operations
05/23/2006US7049188 Lateral doped channel
05/23/2006US7049187 Manufacturing method of polymetal gate electrode
05/23/2006US7049186 Insulated gate type semiconductor device having a diffusion region contacting bottom and side portions of trenches
05/23/2006US7049185 Semiconductor device having dummy gates and its manufacturing method
05/23/2006US7049184 Semiconductor thin film, thin film transistor, method for manufacturing same, and manufacturing equipment of semiconductor thin film
05/23/2006US7049183 Semiconductor film, method for manufacturing semiconductor film, semiconductor device, and method for manufacturing semiconductor device
05/23/2006US7049182 Shunt connection to the emitter of a thyristor
05/23/2006US7049181 Method of making heterojunction P-I-N diode
05/23/2006US7049180 Method of fabricating a memory transistor array utilizing insulated word lines as gate electrodes
05/23/2006US7049179 Semiconductor device and manufacturing method thereof
05/23/2006US7049178 Method for fabricating semiconductor package and semiconductor package
05/23/2006US7049177 Leadless plastic chip carrier with standoff contacts and die attach pad
05/23/2006US7049176 Method of forming thick-film wiring and method of producing laminated electronic component
05/23/2006US7049175 Method of packaging RF MEMS
05/23/2006US7049174 Method of manufacturing mounting substrate and surface mount crystal oscillator
05/23/2006US7049173 Method for fabricating semiconductor component with chip on board leadframe
05/23/2006US7049172 Packaging structure and process of electronic card
05/23/2006US7049171 Electrical package employing segmented connector and solder joint
05/23/2006US7049170 Integrated circuits and packaging substrates with cavities, and attachment methods including insertion of protruding contact pads into cavities
05/23/2006US7049169 Method of fabricating a semiconductor device
05/23/2006US7049168 Image sensor comprising a pixel array having an optical element positioned relative to each pixel
05/23/2006US7049167 CMOS image sensor having test pattern therein and method for manufacturing the same
05/23/2006US7049166 Methods and apparatus for making integrated circuit package including opening exposing portion of the IC
05/23/2006US7049165 Method of manufacturing an external force detection sensor
05/23/2006US7049164 Microelectronic mechanical system and methods
05/23/2006US7049163 Manufacture method of pixel structure
05/23/2006US7049162 Transistor array substrate fabrication for an LCD
05/23/2006US7049161 Method of manufacturing substrate, method of manufacturing organic electroluminescent display device using the method, and organic electroluminescent display device
05/23/2006US7049160 Gallium nitride compound semiconductor device and method of manufacturing the same
05/23/2006US7049159 Stenciling phosphor layers on light emitting diodes
05/23/2006US7049158 Method of manufacturing an emitter
05/23/2006US7049157 Calibration standard for critical dimension verification of sub-tenth micron integrated circuit technology
05/23/2006US7049156 System and method for in-situ monitor and control of film thickness and trench depth
05/23/2006US7049155 Multi beam scanning with bright/dark field imaging
05/23/2006US7049154 Vapor phase growth method by controlling the heat output in the gas introduction region
05/23/2006US7049153 Polymer-based ferroelectric memory
05/23/2006US7049052 Method providing an improved bi-layer photoresist pattern
05/23/2006US7049035 electrochemically depositing an additive material on exposed sidewalls of an etched first layer of the mask whose top remains covered by a hardmask used during the etching of the first layer; a second layer beneath the etched first layer is resistant to the electrochemical deposition of the additive
05/23/2006US7049005 Thermosetting component, oligomer or polymer with cage structure, adhesion promoter; for use as dielectric substrate material, etch stop, hardmask, or air bridge in microchips, wafer coating; polyadamantanes
05/23/2006US7048973 Metal film vapor phase deposition method and vapor phase deposition apparatus
05/23/2006US7048965 applying layers of resins and reinforcements fibers on tiles, then curing to bond and encapsulate the tiles, forming seamless coverings having continuous seals between gaps of adjacent tiles
05/23/2006US7048869 Etching silicon oxide with fluorohydrocarbon or fluorine; controlling temperature
05/23/2006US7048867 Method of increasing the area of a useful layer of material transferred onto a support