Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2006
05/26/2006WO2006054871A1 Dry etching apparatuses and methods of forming an electric device using the same
05/26/2006WO2006054854A1 A method for depositing thin film using ald
05/26/2006WO2006054786A1 Semiconductor integrated circuit wiring design system, semiconductor integrated circuit, and wiring design program
05/26/2006WO2006054758A1 Semiconductor device and manufacturing method of the same
05/26/2006WO2006054732A2 Polishing apparatus and polishing method
05/26/2006WO2006054719A1 Maintenance method, exposure method, exposure apparatus, and device producing method
05/26/2006WO2006054686A1 Method for manufacturing organic thin-film transistor and organic thin-film transistor
05/26/2006WO2006054682A1 Position measurement method, position control method, measurement method, loading method, exposure method, exoposure apparatus, and device production method
05/26/2006WO2006054669A1 Treatment liquid supply apparatus, substrate treatment apparatus and treatment liquid preparation method
05/26/2006WO2006054663A1 Substrate holding apparatus, substrate processing apparatus and liquid crystal display device
05/26/2006WO2006054605A1 Nonvolatile semiconductor storage unit and porduction method therefor
05/26/2006WO2006054588A1 Magnetic memory and manufacturing method thereof
05/26/2006WO2006054544A1 Lighting apparatus, exposure apparatus and micro device manufacturing method
05/26/2006WO2006054543A1 Nitride compound semiconductor device and process for producing the same
05/26/2006WO2006054528A1 Ion implantation device
05/26/2006WO2006054496A1 Synchronization accuracy detecting method and system, aberration detecting method and system, and computer program
05/26/2006WO2006054469A1 Ferromagnetic film, magnetic resistance element and magnetic random access memory
05/26/2006WO2006054459A1 Exposure condition setting method, substrate processing device, and computer program
05/26/2006WO2006054407A1 Electrostatic chuck for vacuum bonding equipment and vacuum bonding equipment using the same
05/26/2006WO2006054406A1 Electrostatic chuck for vacuum bonding system
05/26/2006WO2006054394A1 Silicon carbide mos field-effect transistor and process for producing the same
05/26/2006WO2006054393A1 Method and apparatus for preparing thin film
05/26/2006WO2006054378A1 Polishing tape and polishing method
05/26/2006WO2006054355A1 Semiconductor storage device
05/26/2006WO2006054354A1 Substrate processing equipment, substrate carrying equipment and substrate processing method
05/26/2006WO2006054344A1 Method for manufacturing semiconductor integrated circuit device
05/26/2006WO2006053890A1 Soi substrate materials and method to form si-containing soi and underlying substrate with different orientations
05/26/2006WO2006053832A1 Device and method for fabricating double-sided soi wafer scale package with through via connections
05/26/2006WO2006053690A1 Method and device for thermally treating substrates
05/26/2006WO2006053543A1 Electrical measurement of the thickness of a semiconductor layer
05/26/2006WO2006033717A3 Non-volatile nanocrystal memory transistors using low voltage impact ionization
05/26/2006WO2006033699A3 Low thermal budget silicon nitride formation for transistor fabrication
05/26/2006WO2006029025A3 Substrate carrier having reduced height
05/26/2006WO2006028811A3 Amorphous silicon thin-film transistors and methods of making the same
05/26/2006WO2005123281A3 System and method for carrying out liquid and subsequent drying treatments on one or more wafers
05/26/2006WO2005112577A3 Methods to fabricate mosfet devices using selective deposition processes
05/26/2006WO2005098908A3 Creation of electron traps in metal nitride and metal oxide electrodes in polymer memory devices
05/26/2006WO2005069828A3 Thermal protection for electronic components during processing
05/26/2006WO2005022592A3 Novel aqueous based metal etchant
05/26/2006WO2005020241A3 Fowler-nordheim block alterable eeprom memory cell
05/26/2006CA2554645A1 Method and device for thermally treating substrates
05/25/2006US20060112466 Nanostructure, electronic device and method of manufacturing the same
05/25/2006US20060111805 Fabrication system and fabrication method
05/25/2006US20060111802 Fabrication system and fabrication method
05/25/2006US20060111024 Cellulose-containing polishing compositions and methods relating thereto
05/25/2006US20060110945 Method using specific contact angle for immersion lithography
05/25/2006US20060110944 Dummy substrate for thermal reactor
05/25/2006US20060110943 Remote plasma activated nitridation
05/25/2006US20060110942 Method of manufacturing flash memory device
05/25/2006US20060110941 Method of improving via filling uniformity in isolated and dense via-pattern regions
05/25/2006US20060110940 Method of preparing mesoporous thin film having low dielectric constant
05/25/2006US20060110939 Enhanced thin-film oxidation process
05/25/2006US20060110938 Etch stop layer
05/25/2006US20060110937 Method for fabricating an ultralow dielectric constant material as an intralevel or interlevel dielectric in a semiconductor device and electronic device made
05/25/2006US20060110936 Method of increasing deposition rate of silicon dioxide on a catalyst
05/25/2006US20060110935 Semiconductor device and manufacturing method thereof
05/25/2006US20060110934 Method and apparatus for forming insulating film
05/25/2006US20060110933 Plasma control method and plasma control apparatus
05/25/2006US20060110932 Method and apparatus for oxidizing nitrides
05/25/2006US20060110931 Method for forming insulation film
05/25/2006US20060110930 Direct liquid injection system and method for forming multi-component dielectric films
05/25/2006US20060110929 Anhydrous film for lip make-up or care
05/25/2006US20060110928 Etching of structures with high topography
05/25/2006US20060110927 Package for a semiconductor device
05/25/2006US20060110926 Control of photoelectrochemical (PEC) etching by modification of the local electrochemical potential of the semiconductor structure relative to the electrolyte
05/25/2006US20060110925 Dry etching method and diffractive optical element
05/25/2006US20060110924 Abrasive-free chemical mechanical polishing compositions and methods relating thereto
05/25/2006US20060110923 Barrier polishing solution
05/25/2006US20060110922 Noble metal salts of 1-heteroaromatic- or heterocycloalkyl-substituted-3,5-bis(carboxyanilinotriazines; used for fabricating metal nanostructures such as metal nanowires, nanorods, nanotubes, and nanoribbons
05/25/2006US20060110921 Methods for forming a structured tungsten layer and forming a semiconductor device using the same
05/25/2006US20060110920 Low temperature nitride used as cu barrier layer
05/25/2006US20060110919 Method of forming a wiring pattern, method of manufacturing a device, device, electro-optic device, and electronic instrument
05/25/2006US20060110918 Method and deposition system for increasing deposition rates of metal layers from metal-carbonyl precursors
05/25/2006US20060110917 Method of metallization in the fabrication of integrated circuit devices
05/25/2006US20060110916 Forming an intermediate layer in interconnect joints and structures formed thereby
05/25/2006US20060110915 Semiconductor device having low-k dielectric film in pad region and method for manufacture thereof
05/25/2006US20060110914 Direct imprinting of etch barriers using step and flash imprint lithography
05/25/2006US20060110913 Gate structure having diffusion barrier layer
05/25/2006US20060110912 Semiconductor devices with composite etch stop layers and methods of fabrication thereof
05/25/2006US20060110911 Controlled electroless plating
05/25/2006US20060110910 Method for forming landing plug poly of semiconductor device
05/25/2006US20060110909 Dendrite growth control circuit
05/25/2006US20060110908 Method for forming wiring pattern, method for manufacturing device, device, electro-optic apparatus, and electronic equipment
05/25/2006US20060110907 Method for removing resin mask layer and method for manufacturing solder bumped substrate
05/25/2006US20060110906 Wafer alignment method
05/25/2006US20060110905 High surface area aluminum bond pad for through-wafer connections to an electronic package
05/25/2006US20060110904 Multiple shadow mask structure for deposition shadow mask protection and method of making and using same
05/25/2006US20060110903 Method for formation of a contact in a semiconductor wafer
05/25/2006US20060110902 Method and system for metal barrier and seed integration
05/25/2006US20060110901 Minimizing resist poisoning in the manufacture of semiconductor devices
05/25/2006US20060110900 Method of forming a gate of a semiconductor device
05/25/2006US20060110899 Methods for fabricating a germanium on insulator wafer
05/25/2006US20060110898 Circuitized substrates utilizing smooth-sided conductive layers as part thereof, method of making same, and electrical assemblies and information handling systems utilizing same
05/25/2006US20060110896 Compound semiconductor particles and production process therefor
05/25/2006US20060110895 Method of fabricating silicon-based MEMS devices
05/25/2006US20060110894 Manufacturing method of semiconductor laser devices and manufacturing apparatus of the same
05/25/2006US20060110893 Glass-type planar substrate, use thereof, and method for the production thereof
05/25/2006US20060110892 Semiconductor process for forming stress absorbent shallow trench isolation structures
05/25/2006US20060110891 Method for rounding bottom corners of trench and shallow trench isolation process
05/25/2006US20060110890 Cut-and-paste imprint lithographic mold and method therefor