| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 09/26/2006 | US7112839 Semiconductor device with transistor and capacitor and its manufacture method |
| 09/26/2006 | US7112835 Semiconductor device including a capacitance |
| 09/26/2006 | US7112834 Gate etch process |
| 09/26/2006 | US7112833 Semiconductor device and manufacturing method thereof |
| 09/26/2006 | US7112832 Transistor having multiple channels |
| 09/26/2006 | US7112831 Ternary content addressable memory cell |
| 09/26/2006 | US7112830 Super lattice modification of overlying transistor |
| 09/26/2006 | US7112828 Semiconductor device |
| 09/26/2006 | US7112826 Single crystal GaN substrate semiconductor device |
| 09/26/2006 | US7112822 Semiconductor device using partial SOI substrate and manufacturing method thereof |
| 09/26/2006 | US7112819 Semiconductor device and manufacturing method thereof |
| 09/26/2006 | US7112817 Electronic appliance including transistor having LDD region |
| 09/26/2006 | US7112813 Device inspection method and apparatus using an asymmetric marker |
| 09/26/2006 | US7112812 Optical measurement apparatus |
| 09/26/2006 | US7112810 Ion implanting apparatus and ion implanting method using the same |
| 09/26/2006 | US7112808 Wafer 2D scan mechanism |
| 09/26/2006 | US7112805 Vacuum processing apparatus and vacuum processing method |
| 09/26/2006 | US7112804 Ion implantation ion source, system and method |
| 09/26/2006 | US7112795 Method of controlling metallic layer etching process and regenerating etchant for metallic layer etching process based on near infrared spectrometer |
| 09/26/2006 | US7112792 Defect inspection and charged particle beam apparatus |
| 09/26/2006 | US7112791 Method of inspecting pattern and inspecting instrument |
| 09/26/2006 | US7112778 Active-matrix substrate and electromagnetic wave detector |
| 09/26/2006 | US7112760 Laser annealer and laser thin-film forming apparatus |
| 09/26/2006 | US7112546 Method of manufacturing semiconductor devices comprising a deposition tool cleaning process having a moving plasma zone |
| 09/26/2006 | US7112545 Passivation of material using ultra-fast pulsed laser |
| 09/26/2006 | US7112544 In a reactor, substrates are simultaneously exposed to a first reactive material to form a first mass across the exposed surfaces of the substrates, the first reactive material is removed, and the substrates are exposed to a second reactive material to convert the first mass to a second mass |
| 09/26/2006 | US7112543 Methods of forming assemblies comprising silicon-doped aluminum oxide |
| 09/26/2006 | US7112542 Methods of forming materials between conductive electrical components, and insulating materials |
| 09/26/2006 | US7112541 In-situ oxide capping after CVD low k deposition |
| 09/26/2006 | US7112540 Pretreatment for an electroplating process and an electroplating process in including the pretreatment |
| 09/26/2006 | US7112539 Dielectric layer for semiconductor device and method of manufacturing the same |
| 09/26/2006 | US7112538 In situ growth of oxide and silicon layers |
| 09/26/2006 | US7112537 Method of fabricating interconnection structure of semiconductor device |
| 09/26/2006 | US7112536 Plasma processing system and method |
| 09/26/2006 | US7112535 Precision polysilicon resistor process |
| 09/26/2006 | US7112534 Process for low k dielectric plasma etching with high selectivity to deep uv photoresist |
| 09/26/2006 | US7112533 Plasma etching system and method |
| 09/26/2006 | US7112532 Process for forming a dual damascene structure |
| 09/26/2006 | US7112531 Silicon oxide co-deposition/etching process |
| 09/26/2006 | US7112530 Method of forming contact hole |
| 09/26/2006 | US7112529 Method of improving residue and thermal characteristics of semiconductor device |
| 09/26/2006 | US7112528 Fully planarized dual damascene metallization using copper line interconnect and selective CVD aluminum plug |
| 09/26/2006 | US7112527 Manufacturing method for short distance wiring layers and long distance wiring layers in a semiconductor device |
| 09/26/2006 | US7112526 Manufacturing of a semiconductor device with a reduced capacitance between wirings |
| 09/26/2006 | US7112525 Method for the assembly of nanowire interconnects |
| 09/26/2006 | US7112524 Substrate for pre-soldering material and fabrication method thereof |
| 09/26/2006 | US7112523 Bumping process |
| 09/26/2006 | US7112522 Method to increase bump height and achieve robust bump structure |
| 09/26/2006 | US7112521 Method of making a semiconductor chip assembly with a bumped metal pillar |
| 09/26/2006 | US7112520 Semiconductor die packages with recessed interconnecting structures and methods for assembling the same |
| 09/26/2006 | US7112519 Semiconductor device manufacturing method |
| 09/26/2006 | US7112518 Method and apparatus for cutting devices from substrates |
| 09/26/2006 | US7112517 Laser treatment device, laser treatment method, and semiconductor device fabrication method |
| 09/26/2006 | US7112516 Fabrication of abrupt ultra-shallow junctions |
| 09/26/2006 | US7112515 Method of making a hybrid substrate having a thin silicon carbide membrane layer |
| 09/26/2006 | US7112514 SOI substrate, element substrate, semiconductor device, electro-optical apparatus, electronic equipment, method of manufacturing the SOI substrate, method of manufacturing the element substrate, and method of manufacturing the electro-optical apparatus |
| 09/26/2006 | US7112513 Sub-micron space liner and densification process |
| 09/26/2006 | US7112512 Method of manufacturing liquid crystal display |
| 09/26/2006 | US7112511 CMOS image sensor having prism and method for fabricating the same |
| 09/26/2006 | US7112510 Methods for forming a device isolating barrier and methods for forming a gate electrode using the same |
| 09/26/2006 | US7112509 Method of producing a high resistivity SIMOX silicon substrate |
| 09/26/2006 | US7112508 Method for forming conductive material in opening and structure regarding same |
| 09/26/2006 | US7112507 MIM capacitor structure and method of fabrication |
| 09/26/2006 | US7112506 Method for forming capacitor of semiconductor device |
| 09/26/2006 | US7112505 Method of selectively etching HSG layer in deep trench capacitor fabrication |
| 09/26/2006 | US7112504 Method of forming metal-insulator-metal (MIM) capacitors at copper process |
| 09/26/2006 | US7112503 Enhanced surface area capacitor fabrication methods |
| 09/26/2006 | US7112502 Method to fabricate passive components using conductive polymer |
| 09/26/2006 | US7112501 Method of fabrication a silicon-on-insulator device with a channel stop |
| 09/26/2006 | US7112500 Thin film transistor, liquid crystal display and manufacturing method thereof |
| 09/26/2006 | US7112499 Dual step source/drain extension junction anneal to reduce the junction depth: multiple-pulse low energy laser anneal coupled with rapid thermal anneal |
| 09/26/2006 | US7112498 Methods of forming silicide layer of semiconductor device |
| 09/26/2006 | US7112497 Multi-layer reducible sidewall process |
| 09/26/2006 | US7112496 Method and structure of an auxiliary transistor arrangement used for fabricating a semiconductor memory device |
| 09/26/2006 | US7112495 Structure and method of a strained channel transistor and a second semiconductor component in an integrated circuit |
| 09/26/2006 | US7112494 Write once read only memory employing charge trapping in insulators |
| 09/26/2006 | US7112493 Method of making non-volatile field effect devices and arrays of same |
| 09/26/2006 | US7112492 Methods of fabricating semiconductor devices with scalable two transistor memory cells |
| 09/26/2006 | US7112491 Methods of forming field effect transistors including floating gate field effect transistors |
| 09/26/2006 | US7112490 Hot carrier injection programmable structure including discontinuous storage elements and spacer control gates in a trench |
| 09/26/2006 | US7112489 Negative resist or dry develop process for forming middle of line implant layer |
| 09/26/2006 | US7112488 Source lines for NAND memory devices |
| 09/26/2006 | US7112487 Method for fabricating a stacked capacitor array having a regular arrangement of a plurality of stacked capacitors |
| 09/26/2006 | US7112486 Method for fabricating semiconductor device by using radical oxidation |
| 09/26/2006 | US7112485 Systems and methods for forming zirconium and/or hafnium-containing layers |
| 09/26/2006 | US7112483 Method for forming a device having multiple silicide types |
| 09/26/2006 | US7112482 Method of forming a field effect transistor |
| 09/26/2006 | US7112481 Method for forming self-aligned dual salicide in CMOS technologies |
| 09/26/2006 | US7112480 Method and structure for a low voltage CMOS integrated circuit incorporating higher-voltage devices |
| 09/26/2006 | US7112479 Methods of forming gatelines and transistor devices |
| 09/26/2006 | US7112478 Insulated gate field effect transistor having passivated Schottky barriers to the channel |
| 09/26/2006 | US7112477 Beam homogenizer laser irradiation, apparatus, semiconductor device, and method of fabricating the semiconductor device |
| 09/26/2006 | US7112476 Polycrystalline silicon liquid crystal display device and fabrication method thereof |
| 09/26/2006 | US7112475 Method of fabricating a thin film transistor with multiple gates using metal induced lateral crystallization |
| 09/26/2006 | US7112474 Method of making an integrated circuit package |
| 09/26/2006 | US7112473 Double side stack packaging method |
| 09/26/2006 | US7112472 Methods of fabricating a composite carbon nanotube thermal interface device |
| 09/26/2006 | US7112471 Leadless packaging for image sensor devices and methods of assembly |
| 09/26/2006 | US7112470 Chip dicing |
| 09/26/2006 | US7112469 Method of fabricating a semiconductor package utilizing a thermosetting resin base member |