| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 09/28/2006 | US20060216940 Methods of producing structures for electron beam induced resonance using plating and/or etching |
| 09/28/2006 | US20060216939 Materials for polishing liquid for metal, polishing liquid for metal, method for preparation thereof and polishing method using the same |
| 09/28/2006 | US20060216938 Method of forming pattern |
| 09/28/2006 | US20060216937 Method for reducing dielectric overetch using a dielectric etch stop at a planar surface |
| 09/28/2006 | US20060216936 Chemical and mechanical polishing method and polishing liquid using therefor |
| 09/28/2006 | US20060216935 Composition for oxide CMP in CMOS device fabrication |
| 09/28/2006 | US20060216934 Conducting metal oxide with additive as p-MOS device electrode |
| 09/28/2006 | US20060216933 Methods of forming materials |
| 09/28/2006 | US20060216932 Plasma pre-treating surfaces for atomic layer deposition |
| 09/28/2006 | US20060216931 Method for reducing dielectric overetch when making contact to conductive features |
| 09/28/2006 | US20060216930 Post ECP multi-step anneal/H2 treatment to reduce film impurity |
| 09/28/2006 | US20060216929 Etch stopless dual damascene structure and method of fabrication |
| 09/28/2006 | US20060216928 Cyclical deposition of refractory metal silicon nitride |
| 09/28/2006 | US20060216927 Methods and systems for processing a device, methods and systems for modeling same and the device |
| 09/28/2006 | US20060216926 Method of fabricating a dual damascene interconnect structure |
| 09/28/2006 | US20060216925 Semiconductor integrated circuit device and a method of manufacturing the same |
| 09/28/2006 | US20060216924 BEOL integration scheme for etching damage free ELK |
| 09/28/2006 | US20060216923 Integrated circuit fabrication |
| 09/28/2006 | US20060216922 Integrated circuit fabrication |
| 09/28/2006 | US20060216921 Through conductor and its manufacturing method |
| 09/28/2006 | US20060216920 Method for fabricating semiconductor device and semiconductor device |
| 09/28/2006 | US20060216919 Method for manufacturing semiconductor device, and method and structure for implementing semiconductor device |
| 09/28/2006 | US20060216918 Method for controlling spacer oxide loss |
| 09/28/2006 | US20060216917 Method for forming recess gate of semiconductor device |
| 09/28/2006 | US20060216916 Plasma Treatment at Film Layer to Reduce Sheet Resistance and to Improve Via Contact Resistance |
| 09/28/2006 | US20060216915 Method for forming buried doped region |
| 09/28/2006 | US20060216914 Method of growing non-polar a-plane gallium nitride |
| 09/28/2006 | US20060216913 Asymmetric bidirectional transient voltage suppressor and method of forming same |
| 09/28/2006 | US20060216912 Methods to manufacture contaminant-gettering materials in the surface of EUV optics |
| 09/28/2006 | US20060216911 Wafer laser processing method |
| 09/28/2006 | US20060216910 Active organic semiconductor devices and methods for making the same |
| 09/28/2006 | US20060216909 Method for fabricating a semiconductor device by transferring a layer to a support with curvature |
| 09/28/2006 | US20060216908 Silicon parts joined by a silicon layer preferably plasma sprayed |
| 09/28/2006 | US20060216907 Method of fabricating a semiconductor hetero-structure |
| 09/28/2006 | US20060216906 Methods of forming trench isolation in the fabrication of integrated circuitry and methods of fabricating integrated circuitry |
| 09/28/2006 | US20060216905 Structure and method for placement, sizing and shaping of dummy structures |
| 09/28/2006 | US20060216904 Method of room temperature covalent bonding |
| 09/28/2006 | US20060216902 Rugged metal electrodes for metal-insulator-metal capacitors |
| 09/28/2006 | US20060216901 Metal-insulator-metal (MIM) capacitor structure and methods of fabricating same |
| 09/28/2006 | US20060216900 Smart grading implant with diffusion retarding implant for making integrated circuit chips |
| 09/28/2006 | US20060216899 Silicide process utilizing pre-amorphization implant and second spacer |
| 09/28/2006 | US20060216898 Building fully-depleted and partially-depleted transistors on same chip |
| 09/28/2006 | US20060216897 Semiconductor device having a round-shaped nano-wire transistor channel and method of manufacturing same |
| 09/28/2006 | US20060216896 Semiconductor device and method for manufacturing same |
| 09/28/2006 | US20060216895 Power semiconductor device having buried gate bus and process for fabricating the same |
| 09/28/2006 | US20060216894 Methods of forming recessed access devices associated with semiconductor constructions |
| 09/28/2006 | US20060216893 Manufacturing method of a flash memory cell |
| 09/28/2006 | US20060216892 Method of isolating memory cells |
| 09/28/2006 | US20060216891 Non-volatile memory device and method of fabricating the same |
| 09/28/2006 | US20060216890 Method of fabricating flash memory device |
| 09/28/2006 | US20060216889 Memories having a charge storage node at least partially located in a trench in a semiconductor substrate and electrically coupled to a source/drain region formed in the substrate |
| 09/28/2006 | US20060216888 High K stack for non-volatile memory |
| 09/28/2006 | US20060216886 SRAM devices having buried layer patterns and methods of forming the same |
| 09/28/2006 | US20060216885 Method for fabricating semiconductor device |
| 09/28/2006 | US20060216884 Methd for forming capacitor of semiconductor device |
| 09/28/2006 | US20060216883 Method of manufacturing semiconductor device having triple-well structure and semiconductor device fabricated |
| 09/28/2006 | US20060216882 Using Oxynitride Spacer to Reduce Parasitic Capacitance in CMOS Devices |
| 09/28/2006 | US20060216881 Method for manufacturing semiconductor device |
| 09/28/2006 | US20060216880 FINFET devices and methods of fabricating FINFET devices |
| 09/28/2006 | US20060216879 Method for manufacturing junction semiconductor device |
| 09/28/2006 | US20060216878 Method for fabricating semiconductor device |
| 09/28/2006 | US20060216877 Image display and manufacturing method of the same |
| 09/28/2006 | US20060216876 Selective epitaxy process with alternating gas supply |
| 09/28/2006 | US20060216875 Method for annealing and method for manufacturing a semiconductor device |
| 09/28/2006 | US20060216874 Method for forming low temperature polysilicon thin film transistor with low doped drain structure |
| 09/28/2006 | US20060216873 Image display device and the manufacturing method therefor |
| 09/28/2006 | US20060216872 Method of manufacturing a semiconductor device having an organic thin film transistor |
| 09/28/2006 | US20060216871 Manufacturing CCDs in a conventional CMOS process |
| 09/28/2006 | US20060216870 High density SRAM cell with latched vertical transistors |
| 09/28/2006 | US20060216869 Lithographic apparatus, device manufacturing method, code reading device and substrate |
| 09/28/2006 | US20060216868 Package structure and fabrication thereof |
| 09/28/2006 | US20060216867 Method of manufacturing a semiconductor device |
| 09/28/2006 | US20060216866 Universal interconnect die |
| 09/28/2006 | US20060216865 Direct cooling of leds |
| 09/28/2006 | US20060216864 Stacked die in die BGA package |
| 09/28/2006 | US20060216863 Method of manufacturing semiconductor device |
| 09/28/2006 | US20060216862 Microelectronic devices, methods for forming vias in microelectronic devices, and methods for packaging microelectronic devices |
| 09/28/2006 | US20060216861 Manufacturing method of wiring substrate |
| 09/28/2006 | US20060216860 Flip chip interconnection having narrow interconnection sites on the substrate |
| 09/28/2006 | US20060216859 Package Structure of Semiconductor and Wafer-level Formation Thereof |
| 09/28/2006 | US20060216858 Vertically Stacked Semiconductor Device |
| 09/28/2006 | US20060216857 Chip-scale package for integrated circuits |
| 09/28/2006 | US20060216856 Wafer-level package for integrated circuits |
| 09/28/2006 | US20060216855 Schottky diode device with aluminium pickup of backside cathode |
| 09/28/2006 | US20060216854 Circuit board and process for producing the same |
| 09/28/2006 | US20060216850 Microelectronic imaging units and methods of manufacturing microelectronic imaging units |
| 09/28/2006 | US20060216849 Substrate for stressed systems and method of making same |
| 09/28/2006 | US20060216848 Mechanical quantity measuring apparatus |
| 09/28/2006 | US20060216847 Process for fabricating micromachine |
| 09/28/2006 | US20060216846 Method of forming a microelectronic device |
| 09/28/2006 | US20060216845 White light emitting device and method of making same |
| 09/28/2006 | US20060216844 Optimized optical lithography illumination source for use during the manufacture of a semiconductor device |
| 09/28/2006 | US20060216843 Method of fabricating array substrate having color filter on thin film transistor structure |
| 09/28/2006 | US20060216842 Laser Facet Passivation |
| 09/28/2006 | US20060216841 Method, system and computer-readable code for testing of flash memory |
| 09/28/2006 | US20060216840 Methods for assessing alignments of substrates within deposition apparatuses; and methods for assessing thicknesses of deposited layers within deposition apparatuses |
| 09/28/2006 | US20060216839 Method for monitoring chamber cleanliness |
| 09/28/2006 | US20060216838 Substrate, micro structure, method of making reference scale, and method of measuring length of micro structure |
| 09/28/2006 | US20060216837 Method and apparatus for testing tunnel magnetoresistive effect element, manufacturing method of tunnel magnetoresistive effect element and tunnel magnetoresistive effect element |
| 09/28/2006 | US20060216836 Method for manufacturing magnetic field detection devices and devices therefrom |