| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 09/14/2006 | US20060205227 Atomic layer deposition methods |
| 09/14/2006 | US20060205226 Structure and method for forming semiconductor wiring levels using atomic layer deposition |
| 09/14/2006 | US20060205225 Electronic device and method of making same |
| 09/14/2006 | US20060205224 Large-scale trimming for ultra-narrow gates |
| 09/14/2006 | US20060205223 Line edge roughness reduction compatible with trimming |
| 09/14/2006 | US20060205222 Manufacture of trench-gate semiconductor devices |
| 09/14/2006 | US20060205221 Method to modulate etch rate in SLAM |
| 09/14/2006 | US20060205220 Stabilized photoresist structure for etching process |
| 09/14/2006 | US20060205219 Compositions and methods for chemical mechanical polishing interlevel dielectric layers |
| 09/14/2006 | US20060205218 Compositions and methods for chemical mechanical polishing thin films and dielectric materials |
| 09/14/2006 | US20060205217 Method and system for reducing wafer edge tungsten residue utilizing a spin etch |
| 09/14/2006 | US20060205216 Etching method and apparatus |
| 09/14/2006 | US20060205215 Semiconductor device and method for manufacturing the same |
| 09/14/2006 | US20060205214 Novel silicide structure for ultra-shallow junction for MOS devices |
| 09/14/2006 | US20060205213 Substrate treating apparatus and method for manufacturing semiconductor device |
| 09/14/2006 | US20060205212 Method for forming a plurality of metal lines in a semiconductor device using dual insulating layer |
| 09/14/2006 | US20060205211 Methods for forming interconnects in microelectronic workpieces and microelectronic workpieces formed using such methods |
| 09/14/2006 | US20060205210 Production process of ceramic electronic component |
| 09/14/2006 | US20060205209 Enhanced barrier liner formation for vias |
| 09/14/2006 | US20060205208 Method for manufacturing a semiconductor device and method for etching the same |
| 09/14/2006 | US20060205207 Method for forming dual damascene with improved etch profiles |
| 09/14/2006 | US20060205206 Method of eliminating photoresist poisoning in damascene applications |
| 09/14/2006 | US20060205205 Method for improving the performance of flash memory by using microcrystalline silicon film as a floating gate |
| 09/14/2006 | US20060205204 Method of making a semiconductor interconnect with a metal cap |
| 09/14/2006 | US20060205203 Dual layer barrier film techniques to prevent resist poisoning |
| 09/14/2006 | US20060205202 Method for forming interlayer dielectric film in semiconductor device |
| 09/14/2006 | US20060205201 Electric device and method for fabricating the same |
| 09/14/2006 | US20060205200 Low capacitance solder bump interface structure |
| 09/14/2006 | US20060205199 Technique for the growth of planar semi-polar gallium nitride |
| 09/14/2006 | US20060205198 Method of forming a thin film, method of manufacturing a gate structure using the same and method of manufacturing a capacitor using the same |
| 09/14/2006 | US20060205197 Compound semiconductor devices and methods of manufacturing the same |
| 09/14/2006 | US20060205196 Vertical unipolar component |
| 09/14/2006 | US20060205195 Method of forming an ohmic contact in wide band semiconductor |
| 09/14/2006 | US20060205194 Methods of depositing electrically active doped crystalline Si-containing films |
| 09/14/2006 | US20060205193 Method for forming SiC-based film and method for fabricating semiconductor device |
| 09/14/2006 | US20060205192 Shallow-junction fabrication in semiconductor devices via plasma implantation and deposition |
| 09/14/2006 | US20060205191 Substrate processing method |
| 09/14/2006 | US20060205190 Semiconductor etching apparatus and method of etching semiconductor devices using same |
| 09/14/2006 | US20060205189 Manufacturable recessed strained RSD structure and process for advanced CMOS |
| 09/14/2006 | US20060205188 Plasma igniting method and substrate processing method |
| 09/14/2006 | US20060205187 Methods and apparatus for processing microfeature workpieces, e.g., for depositing materials on microfeature workpieces |
| 09/14/2006 | US20060205186 High dielectric film and related method of manufacture |
| 09/14/2006 | US20060205185 Method of epitaxial deoposition of an n-doped silicon layer |
| 09/14/2006 | US20060205184 Partially transparent photovoltaic modules |
| 09/14/2006 | US20060205183 Wafer laser processing method and laser beam processing machine |
| 09/14/2006 | US20060205182 Method for manufacturing semiconductor device |
| 09/14/2006 | US20060205181 Method for forming an optical silicon layer on a support and use of said method in the production of optical components |
| 09/14/2006 | US20060205180 Applications and equipment of substrate stiffness method and resulting devices for layer transfer processes on quartz or glass |
| 09/14/2006 | US20060205179 Method for making a stressed structure designed to be dissociated |
| 09/14/2006 | US20060205178 Creation of high mobility channels in thin-body SOI devices |
| 09/14/2006 | US20060205177 Stray field shielding structure for semiconductors |
| 09/14/2006 | US20060205176 Method for producing a component, body for producing a component of this type and component produced according to said method |
| 09/14/2006 | US20060205175 Methods of forming silicon dioxide layers, and methods of forming trench isolation regions |
| 09/14/2006 | US20060205174 Method for Manufacturing a Superjunction Device With Wide Mesas |
| 09/14/2006 | US20060205173 Methods for forming isolation films |
| 09/14/2006 | US20060205172 Perfluoroether acyl oligothiophene compounds |
| 09/14/2006 | US20060205171 Chip resistor and method for manufacturing same |
| 09/14/2006 | US20060205170 Methods of forming self-healing metal-insulator-metal (MIM) structures and related devices |
| 09/14/2006 | US20060205169 Method for manufacturing a semiconductor device using a sidewall spacer etchback |
| 09/14/2006 | US20060205168 Method of fabricating a lateral double-diffused MOSFET (LDMOS) transistor |
| 09/14/2006 | US20060205167 Complementary metal oxide semiconductor integrated circuit using uniaxial compressive stress and biaxial compressive stress |
| 09/14/2006 | US20060205166 Semiconductor device and method for manufacturing the same |
| 09/14/2006 | US20060205165 Polysilazane perhydride solution and method of manufacturing a semiconductor device using the same |
| 09/14/2006 | US20060205164 Method of forming a shallow trench isolation structure |
| 09/14/2006 | US20060205163 Method of fabricating a non-volatile memory |
| 09/14/2006 | US20060205162 Method for manufacturing semiconductor device with recess channels and asymmetrical junctions |
| 09/14/2006 | US20060205161 Method for producing a semiconductor device and resulting device |
| 09/14/2006 | US20060205160 Method of forming gate electrode pattern in semiconductor device |
| 09/14/2006 | US20060205159 Method of forming gate flash memory device |
| 09/14/2006 | US20060205158 Method of forming floating gate electrode in flash memory device |
| 09/14/2006 | US20060205157 Non-volatile memory and method for fabricating the same |
| 09/14/2006 | US20060205156 Isolation structure for a memory cell using Al2O3 dielectric |
| 09/14/2006 | US20060205155 Method of fabricating a non-volatile memory element |
| 09/14/2006 | US20060205154 Manufacturing method of an non-volatile memory structure |
| 09/14/2006 | US20060205153 A Semiconductor device and a method of manufacturing thereof |
| 09/14/2006 | US20060205152 Method of fabricating flash memory device |
| 09/14/2006 | US20060205151 Method of fabricating flash memory device |
| 09/14/2006 | US20060205150 Method of fabricating flash memory device |
| 09/14/2006 | US20060205149 Method of fabricating flash memory device |
| 09/14/2006 | US20060205148 Semiconductor memory |
| 09/14/2006 | US20060205147 Self-aligned buried contact pair |
| 09/14/2006 | US20060205146 Low resistance peripheral contacts while maintaining DRAM array integrity |
| 09/14/2006 | US20060205145 Front-end processing of nickel plated bond pads |
| 09/14/2006 | US20060205144 Trench capacitor and method for preparing the same |
| 09/14/2006 | US20060205143 DRAM with high K dielectric storage capacitor and method of making the same |
| 09/14/2006 | US20060205142 Methods of forming semiconductor constructions |
| 09/14/2006 | US20060205141 Method of fabricating semiconductor devices having buried contact plugs |
| 09/14/2006 | US20060205140 Integrated circuit capacitor having antireflective dielectric |
| 09/14/2006 | US20060205139 Method for forming plural kinds of wells on a single semiconductor substrate |
| 09/14/2006 | US20060205138 Method to selectively form SiGe P type electrode and polysilicon N type electrode through planarization |
| 09/14/2006 | US20060205137 Methods and apparatus with silicide on conductive structures |
| 09/14/2006 | US20060205136 Method of making a floating gate non-volatile MOS semiconductor memory device with improved capacitive coupling |
| 09/14/2006 | US20060205135 Silicon rich barrier layers for integrated circuit devices |
| 09/14/2006 | US20060205134 Method for manufacturing a semiconductor device and method for regulating speed of forming an insulating film |
| 09/14/2006 | US20060205133 Method to simultaneously form both fully silicided and partially silicided dual work function transistor gates during the manufacture of a semiconductor device, semiconductor devices, and systems including same |
| 09/14/2006 | US20060205132 Scalable integrated logic and non-volatile memory |
| 09/14/2006 | US20060205131 Method for fabricating semiconductor device |
| 09/14/2006 | US20060205130 Semiconductor integrated circuit device and its manufacturing method |
| 09/14/2006 | US20060205129 Method for manufacturing semiconductor device |
| 09/14/2006 | US20060205128 Integrated circuits and methods of forming a field effect transistor |