Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2006
12/28/2006US20060290012 Multiple mask process with etch mask stack
12/28/2006US20060290011 Molded stiffener for thin substrates
12/28/2006US20060290010 Method of embedding semiconductor chip in support plate and embedded structure thereof
12/28/2006US20060290009 Semiconductor device and method for manufacturing the same
12/28/2006US20060290008 SMT passive device noflow underfill methodology and structure
12/28/2006US20060290003 Substrate structure and manufacturing method of the same
12/28/2006US20060290000 Composite metal layer formed using metal nanocrystalline particles in an electroplating bath
12/28/2006US20060289998 Semiconductor Device and a Method of Manufacturing the Same
12/28/2006US20060289993 Barrier-metal-free copper damascene technology using atomic hydrogen enhanced reflow
12/28/2006US20060289980 Stacked memory card and method for manufacturing the same
12/28/2006US20060289978 Memory element conducting structure
12/28/2006US20060289974 Reliable integrated circuit and package
12/28/2006US20060289969 Laser assisted material deposition
12/28/2006US20060289967 Through-wafer vias and surface metallization for coupling thereto
12/28/2006US20060289966 Silicon wafer with non-soluble protective coating
12/28/2006US20060289965 Thin film transistor array panel and manufacturing method thereof
12/28/2006US20060289959 Yield improvement in silicon-germanium epitaxial growth
12/28/2006US20060289954 Method for processing a MEMS/CMOS cantilever based memory storage device
12/28/2006US20060289952 Method of composite gate formation
12/28/2006US20060289951 Method of composite gate formation
12/28/2006US20060289950 Method of composite gate formation
12/28/2006US20060289949 Method of composite gate formation
12/28/2006US20060289942 Memory cell, semiconductor memory device, and method of manufacturing the same
12/28/2006US20060289931 Recessed gate structures including blocking members, methods of forming the same, semiconductor devices having the recessed gate structures and methods of forming the semiconductor devices
12/28/2006US20060289930 Semiconductor device and method of fabricating the same
12/28/2006US20060289929 Structure and method for forming laterally extending dielectric layer in a trench-gate FET
12/28/2006US20060289928 Insulated gate type semiconductor device and manufacturing method thereof
12/28/2006US20060289925 Non-volatile memory, manufacturing method and operating method thereof
12/28/2006US20060289923 Oxide epitaxial isolation
12/28/2006US20060289921 Method of manufacturing a capacitor for semiconductor device
12/28/2006US20060289913 Pattern definition of MRAM device using chemical mechanical polishing
12/28/2006US20060289907 Metal oxide semiconductor (MOS) transistors having buffer regions below source and drain regions and methods of fabricating the same
12/28/2006US20060289906 Semiconductor device including a capacitance
12/28/2006US20060289903 Method of forming metal/high-k gate stacks with high mobility
12/28/2006US20060289902 Method for forming raised structures by controlled selective epitaxial growth of facet using spacer
12/28/2006US20060289901 Integrated nitride and silicon carbide-based devices and methods of fabricating integrated nitride-based devices
12/28/2006US20060289899 Semiconductor devices having fuses and methods of forming the same
12/28/2006US20060289894 Semiconductor device
12/28/2006US20060289889 Display device and manufacturing method thereof
12/28/2006US20060289877 Semiconductor device
12/28/2006US20060289874 Silicon carbide devices with hybrid well regions
12/28/2006US20060289873 Semiconductor devices and methods of making same
12/28/2006US20060289872 Wiring substrate, electronic device, electro-optical device, and electronic apparatus
12/28/2006US20060289865 Method of manufacturing a semiconductor device
12/28/2006US20060289860 Semiconductor layer
12/28/2006US20060289849 Composition for forming porous film, porous film and method for forming the same, interlevel insulator film, and semiconductor device
12/28/2006US20060289847 Reducing the time to program a phase change memory to the set state
12/28/2006US20060289826 Hazardous substance decomposer and process for producing the same
12/28/2006US20060289803 Apparatus and method for interlocking a power supply to ion implantation equipment, method and apparatus for generating an interlocking signal, method and apparatus for interrupting an ion implantation process, and an interlocking system
12/28/2006US20060289793 Method and apparatus for simultaneously depositing and observing materials on a target
12/28/2006US20060289754 Charged particle beam apparatus
12/28/2006US20060289753 Charged particle beam apparatus
12/28/2006US20060289449 Heater and method of manufacturing the same
12/28/2006US20060289434 Apparatus and method for reducing stray light in substrate processing chambers
12/28/2006US20060289389 Poly etch without separate oxide decap
12/28/2006US20060289385 Plasma etching method and apparatus, control program and computer-readable storage medium storing the control program
12/28/2006US20060289384 Method and apparatus for performing hydrogen optical emission endpoint detection for photoresist strip and residue removal
12/28/2006US20060289382 Method and apparatus for manufacturing patterned media
12/28/2006US20060289333 Wafer container with door actuated wafer restraint
12/28/2006US20060289298 Electrolytic processing apparatus and method
12/28/2006US20060289203 Double-sided wiring board, double sided wiring board manufacturing method, and multilayer wiring board
12/28/2006US20060289116 Plasma processing apparatus
12/28/2006US20060289092 Heat dissipation device having low melting point alloy coating and a method thereof
12/28/2006US20060289034 Compositions containing free radical quenchers
12/28/2006US20060289033 Method of cleaning semiconductor surfaces
12/28/2006US20060288937 Laser assisted material deposition
12/28/2006US20060288936 Cassette for a load-lock
12/28/2006US20060288935 Film formation method and apparatus for semiconductor process
12/28/2006US20060288932 Circuit pattern forming device and circuit pattern forming method
12/28/2006US20060288925 Method for producing single crystal of multi-element oxide single crystal containing bismuth as constituting element
12/28/2006US20060288606 Pocket ventilator
12/28/2006DE19956078B4 Verfahren zur Herstellung eines Isolationskragens in einem Grabenkondensators A process for producing an insulation collar in a grave capacitor
12/28/2006DE112004002634T5 Prozess für eine flache Grabenisolation und Struktur Process for a flat grave isolation and structure
12/28/2006DE112004001102T5 Verfahren zur Steuerung der Planheit und der Elektronenbeweglichkeit von mit Diamant beschichtetem Silizium und dadurch gebildeten Strukturen Method for controlling the flatness and the electron mobility of silicon coated with diamond and structures formed thereby
12/28/2006DE10393853T5 Trench-MIS-Bauteil mit einem implantierten Drain-Drift-Bereich und einem dicken Bodenoxid und Verfahren zur Herstellung desselben Of the same trench MIS device having an implanted drain-drift region and a thick bottom oxide and A process for preparing
12/28/2006DE10393852T5 Trench-MOSFET mit implantiertem Drain-Drift-Bereich und Verfahren zur Herstellung desselben Of the same trench MOSFET with implanted drain-drift region and methods for preparing
12/28/2006DE10335111B4 Montageverfahren für ein Halbleiterbauteil A mounting method of a semiconductor device
12/28/2006DE10331195B4 Verfahren für ein verbessertes epitaktisches Wiederaufwachsen amorpher Polysilizium-CB-Kontakte Method for an improved epitaxial regrowth of amorphous poly-CB contacts
12/28/2006DE10329388B4 Faraday-Anordnung als Ionenstrahlmessvorrichtung für eine Ionenimplantationsanlage und Verfahren zu deren Betrieb Faraday arrangement as an ion beam measurement apparatus for an ion implanter and method of operating the
12/28/2006DE10308888B4 Anordnung von Kondensatoren zur Erhöhung der Speicherkapazität in einem Halbleitersubstrat und Verfahren zur Herstellung einer Anordnung Array of capacitors to increase the memory capacity in a semiconductor substrate and process for manufacturing an arrangement
12/28/2006DE10302623B4 Halbleiterstruktur mit einer reduzierten Anschlußkapazität sowie ein Verfahren zum Herstellen der Halbleiterstruktur Semiconductor structure having a reduced terminal capacity and a method for manufacturing the semiconductor structure
12/28/2006DE10242629B4 Herstellungsverfahren für eine Halbleiterstruktur mit einem teilweise gefüllten Graben Manufacturing method of a semiconductor structure with a partially filled trench
12/28/2006DE10240114B4 Verfahren zur Reduzierung eines Defektpegels nach dem chemisch mechanischen Polieren eines Kupfer enthaltenden Substrats durch Spülen des Substrats mit einer oxidierenden Lösung A method for reducing a defect level after the chemical mechanical polishing of a substrate containing copper by rinsing the substrate with an oxidizing solution
12/28/2006DE10214208B9 Gußform für ein elektronisches Bauelement und elektronisches Bauelement Mold for an electronic component and electronic component
12/28/2006DE102006028320A1 Thin film transistor liquid crystal display device, has semiconductor patterns formed between data lines and semiconductor layers, where semiconductor patterns exposed to light from backlight are removed
12/28/2006DE102006027429A1 Photo mask, for the production of integrated circuits on semiconductor wafers, is produced with reduced critical dimension irregularities by passing light of the zero order to a spectrometer to adjust the optical parameters
12/28/2006DE102006026710A1 Infrarot-Prüfvorrichtung, Infrarot-Prüfverfahren und Halbleiterwafer-Herstellungsverfahren Tester infrared, infrared test methods and semiconductor wafer production method
12/28/2006DE102006026248A1 Photo mask for use in photolithography system has polarizing structure that is formed in either peripheral circuit region or memory cell region of substrate
12/28/2006DE102006026229A1 Probe for e.g. integrated circuit, has contact tips located within periphery of coaxial cable and shielded by ground conductor of coaxial cable, where coaxial cable terminates in oblique terminal section
12/28/2006DE102006025342A1 Halbleitervorrichtung mit isoliertem Gate und Herstellungsverfahren dafür A semiconductor device comprising insulated gate and production method thereof
12/28/2006DE102006023730A1 Speicherzellenfeld und Verfahren zu dessen Herstellung Memory cell array and process for its preparation
12/28/2006DE102005062921A1 Liquid crystal display panel cutting system for cutting a bonded color filter substrate has a controller which controls the driving condition of the cutting wheel according to the characteristics of the substrates
12/28/2006DE102005045331A1 Entfernen von dünnen strukturierten Polymerschichten durch atmosphärisches Plasma Removing thin patterned polymer layers by atmospheric plasma
12/28/2006DE102005034062A1 Device for receiving and placing of flip-chips on a foil-shaped support has boundary elements which exhibits soldered connections in sections of a smaller height
12/28/2006DE102005029407A1 Verfahren und Vorrichtung zum dauerhaften Verbinden integrierter Schaltungen mit einem Substrat Method and apparatus for permanently joining integrated circuits to a substrate
12/28/2006DE102005028996A1 Electronic component e.g. temperature sensor, arranging method, involves arranging component in sleeve, and subsequently producing casing so that sleeve is surrounded by casing, where heat developed during casting is dissipated by sleeve
12/28/2006DE102005028461A1 Verfahren zum Testen eines Wafers, insbesondere Hall-Magnetfeld-Sensors und Wafer bzw. Hallsensor A method of testing a wafer, in particular Hall-effect sensor and the Hall sensor wafer or
12/28/2006DE102005028224A1 Trench transistor, e.g. magnetoresistive transistor, for e.g. memory chip, has mesa region between marginal trenches, and marginal electrode structure set to potential lying between drain and source potentials, or to source potential
12/28/2006DE102005028202A1 Production of silicon semiconductor wafers for fabrication of electronic components comprises controlling ratio of pulling rate to axial temperature gradient to produce agglomerated vacancy defects above critical size in single crystal
12/28/2006DE102005027459A1 Semiconductor structure production, involves removing oblation layer based on two intermediate layers and filling, and immersing one layer at ditch walls around preset height to form gap between filling and semiconductor substrate