Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2007
06/28/2007US20070145494 Semiconductor device and method for manufacturing the same
06/28/2007US20070145492 Semiconductor device and method of manufacture
06/28/2007US20070145485 Integrated circuit devices having pad contact plugs in the cell array and peripheral circuit regions of the integrated circuit substrate
06/28/2007US20070145477 Transistor having a protruded drain
06/28/2007US20070145472 Flash memory cell including dual tunnel oxide layer and method of manufacturing the same
06/28/2007US20070145471 Semiconductor device and method of manufacturing the same
06/28/2007US20070145470 Semiconductor device and method of manufacturing the same
06/28/2007US20070145469 Split gate type non-volatile memory device
06/28/2007US20070145464 Random access memory device utilizing a vertically oriented select transistor
06/28/2007US20070145462 Low tunnel barrier insulators
06/28/2007US20070145457 System and Method of Forming A Split-Gate Flash Memory Structure
06/28/2007US20070145452 Integrated Circuit Devices Including A Capacitor
06/28/2007US20070145445 CMOS Image Sensor and Method for Manufacturing the Same
06/28/2007US20070145405 Light emitting device and method of fabricating the same
06/28/2007US20070145402 Semiconductor component which emits radiation, and method for producing the same
06/28/2007US20070145396 Semiconductor light emitting device and method of manufacturing the same
06/28/2007US20070145390 Nitride-based semiconductor device
06/28/2007US20070145377 Semiconductor device and method for manufacturing same
06/28/2007US20070145376 Gallium Nitride Crystal Substrate, Semiconductor Device, Method of Manufacturing Semiconductor Device, and Method of Identifying Gallium Nitride Crystal Substrate
06/28/2007US20070145375 Method of manufacturing nanowire, method of manufacturing a semiconductor apparatus including nanowire and semiconductor apparatus formed from the same
06/28/2007US20070145372 Semiconductor device, and electronic apparatus
06/28/2007US20070145362 Passive electronic devices
06/28/2007US20070145354 Organic thin-film transistors
06/28/2007US20070145306 Lithographic apparatus, method for calibrating and device manufacturing method
06/28/2007US20070145103 Electrostatic methods and apparatus for mounting and demounting particles from a surface having an array of tacky and non-tacky areas
06/28/2007US20070145017 Surface planarization of thin silicon films during and after processing by the sequential lateral solidification method
06/28/2007US20070145013 Method for polishing workpiece, polishing apparatus and method for manufacturing semiconductor device
06/28/2007US20070145011 Chemical mechanical polishing system and process
06/28/2007US20070145010 Removal rate estimating method of a chemical mechanical polishing process under mixed products or mixed layers
06/28/2007US20070145009 Etch Compositions and Methods of Processing a Substrate
06/28/2007US20070145007 Semiconductor structure
06/28/2007US20070145005 Controlling system and method for operating the same
06/28/2007US20070145003 Method of etching semiconductor device
06/28/2007US20070144673 Apparatus for fabricating flat panel display and method for preventing substrate damage using the same
06/28/2007US20070144671 Shower plate, plasma processing apparatus, and product manufacturing method
06/28/2007US20070144670 Vacuum apparatus including a particle monitoring unit, particle monitoring method and program, and window member for use in the particle monitoring
06/28/2007US20070144556 Reciprocating megasonic probe
06/28/2007US20070144442 Susceptor
06/28/2007US20070144439 Cartesian cluster tool configuration for lithography type processes
06/28/2007US20070144438 Systems and methods of forming refractory metal nitride layers using disilazanes
06/28/2007US20070144436 Gas coupler for substrate processing chamber
06/28/2007US20070144259 Semiconductor acceleration sensor and fabrication method thereof
06/28/2007US20070143994 Thermally isolated via structure
06/28/2007US20070143993 Substrate structure with capacitor component embedded therein and method for fabricating the same
06/28/2007DE4210774B4 Verfahren zum Ausrichten eines Halbleiterchips, der mit Hilfe eines Reparatursystems repariert werden soll, sowie Laser-Reparaturtarget zur Verwendung für dieses Verfahren A method for aligning a semiconductor chip which is to be repaired by means of a repair system, and laser repair target for use for this method
06/28/2007DE19605670B4 Aktivmatrixanzeigegerät Active matrix display device
06/28/2007DE112005000223T5 Verbesserte Betriebsweise mit III-nitrierten Feldeffekttransistoren Improved operation with III-nitrided field-effect transistors
06/28/2007DE10324052B4 Verfahren zur Herstellung eines Halbleiterspeichers mit Charge-Trapping-Speicherzellen A method for producing a semiconductor memory having charge trapping memory cells
06/28/2007DE10314574B4 Verfahren zur Herstellung einer Grabenisolationsstruktur A process for the preparation of a grave isolation structure
06/28/2007DE10208881B4 Selbstjustierendes Verfahren zur Herstellung eines Doppel-Gate MOSFET sowie durch dieses Verfahren hergestellter Doppel-Gate MOSFET Self-aligning method of manufacturing a dual gate MOSFET, and produced by this process double-gate MOSFET
06/28/2007DE102006058321A1 Mehrschichtige Polierkissen mit verbesserter Fehlerhaftigkeit und Verfahren zur Herstellung Multi-layer polishing pad with an improved process for the production inaccuracy and
06/28/2007DE102006053926A1 Semiconductor component e.g. static random access memory, manufacturing method, involves forming set of ditches by selective etching of insulating layer using set of photoresist structures, and forming metallic connection in each ditch
06/28/2007DE102006015241A1 Quad flat non-leaded package semiconductor component, has expansion joint arranged in plastic housing and provided between border angle region and outer contact surfaces of outer contact and central region of housing
06/28/2007DE102006008503A1 Verfahren zur Herstellung von nichtflüchtigen Speicherzellen Process for the preparation of non-volatile memory cells
06/28/2007DE102005060800A1 Negative to positive transition for e.g. transistor, has particles radiated in semiconductor material, where energies of particles and radiation intensity are controlled according to distribution of donors and acceptors
06/28/2007DE102005060723A1 Nano-arrangement e.g. semiconductor-nano-arrangement, has freestanding structures superimposed on substrate, and nano-support units provided between structures, where support units are designed as nano-wires and/or nano tubes
06/28/2007DE102005060702A1 Vertical transistor to operate as a metal oxide semiconductor (MOS) transistor has a semiconductor substrate, a semiconductor layer with specific resistance, drains and a mesa region
06/28/2007DE102005060456A1 Plastic film fabricating method for fabricating semiconductor components, involves filling fluid in area separated by film, so that pressure difference caused by filling presses film on wafer, where plastic coating is formed on film
06/28/2007DE102005060083A1 Semiconductor memory component e.g. stacked gate flash cell type memory component, has one of insulating layers arranged at upper surface of rib, and word line that covers insulating layer and charge capturing layer
06/28/2007DE102005059850A1 Vorrichtung zum Reinigen und Trocknen von Wafern An apparatus for cleaning and drying of wafers
06/28/2007DE102005059231A1 Interconnecting-semiconductor field effect transistor manufacturing method for optoelectronic device, involves forming fin-structure by structuring two layers and covering layer, and forming gate region on region of side wall of structure
06/28/2007DE102005051973B3 Herstellungsverfahren für vertikale Leitbahnstruktur, Speichervorrichtung sowie zugehöriges Herstellungsverfahren Manufacturing method for vertical interconnect structure, storage device and manufacturing method thereof
06/28/2007DE102005008495A1 MIS-Bauteil mit einem implantierten Drain-Drift-Bereich MIS device having an implanted drain-drift region
06/28/2007DE102004021398B4 Verfahren und Schaltungsanordnung zum Zurücksetzen einer integrierten Schaltung Method and circuit for resetting an integrated circuit
06/28/2007DE10136281B4 Vorrichtung zum Polieren abgeschrägter Umfangsteile eines Wafers Apparatus for polishing beveled peripheral parts of a wafer
06/28/2007DE10121010B4 Halter für Halbleiterwafer in einer Bürstenreinigungsanlage Holder for semiconductor wafer in a brush cleaning system
06/28/2007DE10118167B4 Vorrichtung und Verfahren zur Reinigung von Halbleiterwafern Apparatus and method for cleaning of semiconductor wafers
06/28/2007DE10117890B4 Verfahren zum Herstellen eines strahlungsempfangenden und/oder -emittierenden Halbleiterbauelements und strahlungsempfangendes und/oder -emittierendes Halbleiterbauelement A method of manufacturing a radiation-receiving and / or emitting semiconductor device and radiation-receiving end and / or semiconductor component -emittierendes
06/28/2007CA2634599A1 Thinned image sensor with trench-insulated contact terminals
06/27/2007EP1801892A1 Production method for semiconductor light emittingt element and semiconductor light emitting element
06/27/2007EP1801888A1 Function element mounting module and manufacturing method thereof
06/27/2007EP1801873A1 High withstand voltage semiconductor device covered with resin and process for producing the same
06/27/2007EP1801870A1 Partial adherent temporary substrate and method of using the same
06/27/2007EP1801869A1 Container carrying equipment
06/27/2007EP1801868A2 Container for transporting precision substrates
06/27/2007EP1801867A2 Method of flip-chip mounting a semiconductor chip to a circuit board, circuit board for flip-chip connection and method of manufacturing the same
06/27/2007EP1801866A2 Semiconductor device and method of manufacturing the same
06/27/2007EP1801865A1 GaN-BASED FIELD EFFECT TRANSISTOR AND PRODUCTION METHOD THEREFOR
06/27/2007EP1801864A1 Method for selective epitaxial growth of source/drain areas
06/27/2007EP1801863A1 Silicon epitaxial wafer and method for manufacturing the same
06/27/2007EP1801862A1 Vertical heat treatment apparatus and method for using the same
06/27/2007EP1801861A1 Method and device for treating outer periphery of base material
06/27/2007EP1801860A1 Substrate processing method and substrate processing apparatus
06/27/2007EP1801859A1 Soi wafer cleaning method
06/27/2007EP1801858A1 Method for gate electrode height control
06/27/2007EP1801857A2 Multi-bit non-volatile memory devices and methods of fabricating the same
06/27/2007EP1801856A1 Method for gate electrode height control
06/27/2007EP1801855A1 Processes for selective masking of III-N layers and for the preparation of free-standing III-N layers or of devices, and products obtained thereby
06/27/2007EP1801854A1 Method for manufacturing semiconductor wafer
06/27/2007EP1801853A1 Exposure apparatus and device manufacturing method
06/27/2007EP1801852A1 Support method and support structure for optical member, optical apparatus, exposure apparatus, and device production method
06/27/2007EP1801851A2 Method and apparatus for drying semiconductor wafer surfaces using a plurality of inlets and outlets held in close proximity to the wafer surfaces
06/27/2007EP1801850A1 Substrate holding apparatus, exposure apparatus and device manufacturing method
06/27/2007EP1801849A2 Semiconductor device, method of manufacturing the same, and camera module
06/27/2007EP1801843A1 Arrangement and method for the treatment of substrates
06/27/2007EP1801739A1 Noncontact ic label and method and apparatus for manufacturing the same
06/27/2007EP1801658A2 EUV-lithographic projection apparatus comprising an optical element with a capping layer
06/27/2007EP1801648A1 Photosensitive transfer material and pattern forming method and pattern
06/27/2007EP1801647A1 Photomask blank and photomask
06/27/2007EP1801640A1 Liquid crystal display device and method for manufacturing the same