Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
01/2008
01/31/2008WO2008012899A1 Semiconductor circuit device, semiconductor circuit device system, and manufacturing method for the semiconductor circuit device
01/31/2008WO2008012889A1 Electronic component transfer method and electronic component handling device
01/31/2008WO2008012877A1 COMPOUND SEMICONDUCTOR DEVICE EMPLOYING SiC SUBSTRATE AND PROCESS FOR PRODUCING THE SAME
01/31/2008WO2008012536A1 System and method for generating design rules for semiconductor devices
01/31/2008WO2008012481A1 Process for fabricating an encapsulated integrated circuit and associated encapsulated integrated circuit
01/31/2008WO2008012351A1 Method of producing a film-type sensor
01/31/2008WO2008012332A1 Component comprising a thin-film-transistor and cmos-transistors and methods for production
01/31/2008WO2008012098A2 Silane-free plasma-assisted cvd deposition of silicon nitride as an antireflective film and for hydrogen passivation of photocells constructed on silicon wafers
01/31/2008WO2008011979A1 Deposition of group iii-nitrides on ge
01/31/2008WO2008011897A1 Method for smoothing iii-n substrates
01/31/2008WO2008011796A1 Polishing slurry for low dielectric material
01/31/2008WO2008011766A1 Precise positioning system for dual stage switching exposure
01/31/2008WO2008011688A2 GROWTH OF MONOCRYSTALLINE GeN ON A SUBSTRATE
01/31/2008WO2008011687A2 Conductive contacts on ge
01/31/2008WO2007143387A3 Conductive hard mask to protect patterned features during trench etch
01/31/2008WO2007142612B1 Apparatus and method for cleaning, etching, activation and subsequent treatment of glass surfaces, glass surfaces coated by metal oxides, and surfaces of other sio2-coated materials
01/31/2008WO2007140375A3 Methods and systems for selectively depositing si-containing films using chloropolysilanes
01/31/2008WO2007139896A3 Substrate processing apparatus
01/31/2008WO2007133604A3 Method for forming a semiconductor on insulator structure
01/31/2008WO2007126488A3 Method for fabricating a semiconductor component including a high capacitance per unit area capacitor
01/31/2008WO2007120891A3 Method for forming bit line contacts and bit lines during the formation of a flash memory device, and devices including the bit lines awd bit line contacts
01/31/2008WO2007117301A3 Ball contact cover for copper loss reduction and spike reduction
01/31/2008WO2007109068A3 Stacked non-volatile memory with silicon-carbige-based amorphous-silicon thin-film transistors and manufacturing method thereof
01/31/2008WO2006135505A3 Capacitorless dram over localized soi
01/31/2008WO2005055283A3 Monitoring an electropolishing process in integrated circuit fabrication
01/31/2008US20080028361 Pattern evaluation method and evaluation apparatus and pattern evaluation program
01/31/2008US20080028358 Quick and accurate modeling of transmitted field
01/31/2008US20080028349 Method for identifying semiconductor integrated circuit device, method for manufacturing semiconductor integrated circuit device, semiconductor integrated circuit device and semiconductor chip
01/31/2008US20080028233 LSI design method and verification method
01/31/2008US20080028134 Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein
01/31/2008US20080027576 Defect probability calculating method and semiconductor device manufacturing method
01/31/2008US20080027525 Electrode Structure
01/31/2008US20080027394 Catheter securement device
01/31/2008US20080026975 Aqueous alcoholic solution of (perfluoromorpholino)perfluoroisobutyric acid or 1,3-dioxoperfluoro-1,3,2-dithiazane; prevents pattern falling during formation of a fine pattern having a high aspect ratio
01/31/2008US20080026681 Conductive polishing article for electrochemical mechanical polishing
01/31/2008US20080026599 Transfer of stress to a layer
01/31/2008US20080026598 Semiconductor manufacturing device and method
01/31/2008US20080026597 Method for depositing and curing low-k films for gapfill and conformal film applications
01/31/2008US20080026596 Method of forming metallic oxide films using atomic layer deposition
01/31/2008US20080026595 Method of forming an integrated circuit having a device wafer with a diffused doped backside layer
01/31/2008US20080026594 Reduction of Cracking in Low-K Spin-On Dielectric Films
01/31/2008US20080026593 Method and Apparatus for the Manufacture of Electric Circuits
01/31/2008US20080026592 Multilayer substrate
01/31/2008US20080026591 Sintered metal components for crystal growth reactors
01/31/2008US20080026590 Metal organic deposition precursor solution synthesis and terbium-doped SiO2 thin film deposition
01/31/2008US20080026589 Electrode for plasma processes and method for manufacture and use thereof
01/31/2008US20080026588 Method of forming inductor in semiconductor device
01/31/2008US20080026587 Semiconductor device
01/31/2008US20080026586 Phase change memory cell and method and system for forming the same
01/31/2008US20080026585 Composition for removing a film, method of removing a film using the same, and method of forming a pattern using the same
01/31/2008US20080026584 LPCVD gate hard mask
01/31/2008US20080026583 Compositions and methods for modifying a surface suited for semiconductor fabrication
01/31/2008US20080026582 Planarization process for pre-damascene structure including metal hard mask
01/31/2008US20080026581 Flexible substrate with electronic devices formed thereon
01/31/2008US20080026580 Method For Forming Copper Metal Lines In Semiconductor Integrated Circuit Devices
01/31/2008US20080026579 Copper damascene process
01/31/2008US20080026578 Organometallic compounds
01/31/2008US20080026577 Chemical vapor deposition, atomic layer deposition, or metal organic chemical vapor depositon of metal thin films of heteroleptic metallized phosphoamidine precursors for chemisorption on a substrate; liquid injection of decomposer; functionality balance; heat resistance; metal center shielding
01/31/2008US20080026576 Organometallic compounds
01/31/2008US20080026575 Dispenser system for atomic beam assisted metal organic chemical vapor deposition (MOCVD)
01/31/2008US20080026574 Method and apparatus of distributed plasma processing system for conformal ion stimulated nanoscale deposition process
01/31/2008US20080026573 Method of producing active matrix substrate
01/31/2008US20080026572 Method for forming a strained transistor by stress memorization based on a stressed implantation mask
01/31/2008US20080026571 Bit Line Barrier Metal Layer for Semiconductor Device and Process for Preparing the Same
01/31/2008US20080026570 Method of forming a metal line of a semiconductor memory device
01/31/2008US20080026569 Advanced Seed Layers for Interconnects
01/31/2008US20080026568 Interconnect structure and process of making the same
01/31/2008US20080026567 Increasing electromigration lifetime and current density in ic using vertically upwardly extending dummy via
01/31/2008US20080026566 Dual damascene interconnect structures having different materials for line and via conductors
01/31/2008US20080026565 Method of manufacturing a composite of copper and resin
01/31/2008US20080026564 Method of forming an electrically conductive line in an integrated circuit
01/31/2008US20080026563 Semiconductor device manufacturing device
01/31/2008US20080026562 Novel Metallization Scheme and Method of Manufacture Therefor
01/31/2008US20080026561 Methods of trench and contact formation in memory cells
01/31/2008US20080026560 Methods of forming electronic structures including conductive shunt layers and related structures
01/31/2008US20080026559 Solder Ball Pad Structure
01/31/2008US20080026558 Pad structure for liquid crystal display and method of manufacturing thereof
01/31/2008US20080026557 Electronic system modules and method of fabrication
01/31/2008US20080026556 Barrier process/structure for transistor trench contact applications
01/31/2008US20080026555 Sacrificial tapered trench opening for damascene interconnects
01/31/2008US20080026554 Interconnect structure for beol applications
01/31/2008US20080026553 Method for fabricating an integrated gate dielectric layer for field effect transistors
01/31/2008US20080026552 Method of enhancing lithography capabilities during gate formation in semiconductors having a pronounced surface topography
01/31/2008US20080026551 Formation of fully silicided metal gate using dual self-aligned silicide process
01/31/2008US20080026550 Laser doping of solid bodies using a linear-focussed laser beam and production of solar-cell emitters based on said method
01/31/2008US20080026549 Methods of controlling morphology during epitaxial layer formation
01/31/2008US20080026548 Film Forming Apparatus and Film Forming Method
01/31/2008US20080026547 Method of forming poly-si pattern, diode having poly-si pattern, multi-layer cross point resistive memory device having poly-si pattern, and method of manufacturing the diode and the memory device
01/31/2008US20080026546 Crystal growth method and reactor design
01/31/2008US20080026545 Integrated devices on a common compound semiconductor III-V wafer
01/31/2008US20080026544 Method for improving the quality of an SiC crystal and an SiC semiconductor device
01/31/2008US20080026543 Method of manufacturing semiconductor device
01/31/2008US20080026542 Method of Manufacturing Semiconductor Device
01/31/2008US20080026541 Air-gap interconnect structures with selective cap
01/31/2008US20080026540 Integration for buried epitaxial stressor
01/31/2008US20080026539 Capacitance element manufacturing method and etching method
01/31/2008US20080026538 Methods of forming capacitors for semiconductor memory devices and resulting semiconductor memory devices
01/31/2008US20080026537 Method for forming capacitor of semiconductor device
01/31/2008US20080026536 Integrated process for thin film resistors with silicides
01/31/2008US20080026535 Phase-changeable memory device and method of manufacturing the same