Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
04/2008
04/24/2008WO2008011296A3 Process and system for quality management and analysis of via drilling
04/24/2008WO2008005161A3 Semiconductor assemblies and manufacturing methods thereof
04/24/2008WO2007150032A3 Solderability improvement method for leaded semiconductor package
04/24/2008WO2007149720A3 Semiconductive device having resist poison aluminum oxide barrier and method of manufacture
04/24/2008WO2007143008A3 Semiconductor having improved gate-to-drain breakdown voltage
04/24/2008WO2007140288A3 Formation of improved soi substrates using bulk semiconductor wafers
04/24/2008WO2007139765A3 Semiconductor-on-diamond devices and associated methods
04/24/2008WO2007133806A3 Wafer level semiconductor chip packages and methods of making the same
04/24/2008WO2007133271A3 Methods for oriented growth of nanowires on patterned substrates
04/24/2008WO2007130148A3 Method of fabricating reduced subthreshold leakage current submicron nfet's with high iii/v ratio material
04/24/2008WO2007126679A3 Heterojunction device comprising a semiconductor and a resistivity-switching oxide or nitride
04/24/2008WO2007098071A3 Process tuning gas injection from the substrate edge
04/24/2008WO2007042797A8 Positive displacement pumping chamber
04/24/2008US20080098203 Apparatus, method, system and executable module for configuration and operation of adaptive integrated circuitry havingf fixed, application specific computational elements
04/24/2008US20080097647 Liquid processing apparatus, liquid processing method, computer program, and storage medium
04/24/2008US20080097641 Interconnect structure of semiconductor integrated circuit, and design method and device therefor
04/24/2008US20080097627 Monitoring method of processing state and processing unit
04/24/2008US20080096475 Polishing Composition and Polishing Method
04/24/2008US20080096396 Methods of Forming Low Hydrogen Concentration Charge-Trapping Layer Structures for Non-Volatile Memory
04/24/2008US20080096395 Producing Method of Semiconductor Device
04/24/2008US20080096394 Gate dielectric layers and methods of fabricating gate dielectric layers
04/24/2008US20080096393 Apparatus and method of etching a semiconductor substrate
04/24/2008US20080096392 Ashing system
04/24/2008US20080096391 Method of fabricating semiconductor device having fine contact holes
04/24/2008US20080096390 chemical mechanical polishing composition; abrasive silica particles, hydrogen peroxide, halogen compound, and benzotriazole; tantalum and copper
04/24/2008US20080096389 Copper damascene chemical mechanical polishing (CMP) for thin film head writer fabrication
04/24/2008US20080096388 Planarization method using hybrid oxide and polysilicon cmp
04/24/2008US20080096387 Method for removing photoresist layer and method of forming opening
04/24/2008US20080096386 Method of forming a phase-changeable layer and method of manufacturing a semiconductor memory device using the same
04/24/2008US20080096385 Slurry composition for forming tungsten pattern and method for manufacturing semiconductor device using the same
04/24/2008US20080096384 Method of forming damascene filament wires
04/24/2008US20080096383 Method of manufacturing a semiconductor device with multiple dielectrics
04/24/2008US20080096382 Method for producing an integrated circuit including a connection contact on a semiconductor body
04/24/2008US20080096381 Atomic layer deposition process for iridium barrier layers
04/24/2008US20080096380 Low-k interconnect structures with reduced RC delay
04/24/2008US20080096379 Flip chip metallization method and devices
04/24/2008US20080096378 Contact structure and method of forming the same
04/24/2008US20080096377 Semiconductor device and method for forming the same
04/24/2008US20080096376 Transparent zinc oxide electrode having a graded oxygen content
04/24/2008US20080096375 Method for Making Memory Cell Device
04/24/2008US20080096374 Selective removal of rare earth based high-k materials in a semiconductor device
04/24/2008US20080096373 Fabrication of ccd image sensors using single layer polysilicon
04/24/2008US20080096372 Patterning of doped poly-silicon gates
04/24/2008US20080096371 Process For Producing P-Doped and Epitaxially Coated Semiconductor Wafers From Silicon
04/24/2008US20080096370 Method of manufacturing dual orientation wafers
04/24/2008US20080096369 Apparatus and method for high-throughput chemical vapor deposition
04/24/2008US20080096368 Wafer processing method
04/24/2008US20080096367 Method for Laser Dicing of a Substrate
04/24/2008US20080096366 Method for forming conductive layer and substrate having the same, and method for manufacturing semiconductor device
04/24/2008US20080096365 Permanent wafer bonding using metal alloy preform discs
04/24/2008US20080096364 Conformal liner for gap-filling
04/24/2008US20080096363 High Dielectric Constant Materials
04/24/2008US20080096362 Plasma display panel and manufacturing method of the same
04/24/2008US20080096361 Structure for realizing integrated circuit having schottky diode and method of fabricating the same
04/24/2008US20080096360 Semiconductor wafer suitable for forming a semiconductor junction diode device and method of forming same
04/24/2008US20080096359 Method of determining angle misalignment in beam line ion implanters
04/24/2008US20080096358 Method of fabricating semiconductor device having reduced contact resistance
04/24/2008US20080096357 Method for manufacturing a memory device
04/24/2008US20080096356 Substrate Having Silicon Germanium Material and Stressed Silicon Nitride Layer
04/24/2008US20080096355 Transistor structure of memory device and method for fabricating the same
04/24/2008US20080096354 Vertical MOS transistor with embedded gate and its fabrication process
04/24/2008US20080096353 Semiconductor device having a recessed gate and asymmetric dopant regions and method of manufacturing the same
04/24/2008US20080096352 Method of forming a semiconductor memory device and semiconductor memory device
04/24/2008US20080096351 Memory device and method of manufacturing the same
04/24/2008US20080096350 Nonvolatile memory device and fabrication method
04/24/2008US20080096349 Method of fabricating a nonvolatile memory device
04/24/2008US20080096348 Contacts for semiconductor devices
04/24/2008US20080096347 Methods of forming electronic devices including electrodes with insulating spacers thereon
04/24/2008US20080096346 Method for Preparing a Trench Capacitor Structure
04/24/2008US20080096345 maximize the nanowire surface area while providing mechanical support; large surface area and nanospaces between cathodes and anodes that significantly improve electrochemical performance; nanowire shell having nanowire connected to bottom electrode top surface; nanowire sleeves filled with electrolyte
04/24/2008US20080096344 Method for Manufacturing a Resistor Random Access Memory with a Self-Aligned Air Gap insulator
04/24/2008US20080096343 Fabricating method of cmos
04/24/2008US20080096342 Cmos circuits including a passive element having a low end resistance
04/24/2008US20080096341 Method for Manufacturing a Resistor Random Access Memory with Reduced Active Area and Reduced Contact Areas
04/24/2008US20080096340 Method of fabricating a nonvolatile memory device
04/24/2008US20080096339 Cmos devices with hybrid channel orientations and method for fabricating the same
04/24/2008US20080096338 Methods and devices employing metal layers in gates to introduce channel strain
04/24/2008US20080096337 Disposable semiconductor device spacer with high selectivity to oxide
04/24/2008US20080096336 Method of forming integrated circuit devices having n-MOSFET and p-MOSFET transistors with elevated and silicided source/drain structures
04/24/2008US20080096335 SiC metal semiconductor field-effect transistors and methods for producing same
04/24/2008US20080096334 Semiconductor device manufacturing method and semiconductor device using the same
04/24/2008US20080096333 Method of manufacturing a thin film transistor substrate and stripping composition
04/24/2008US20080096332 Method of manufacturing a thin-film transistor substrate
04/24/2008US20080096331 Method for fabricating high compressive stress film and strained-silicon transistors
04/24/2008US20080096330 High-performance cmos soi devices on hybrid crystal-oriented substrates
04/24/2008US20080096329 Method of manufacturing thin film device, electro-optic device, and electronic instrument
04/24/2008US20080096328 Nonvolatile memory devices and methods of forming the same
04/24/2008US20080096327 Novel monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout
04/24/2008US20080096326 Method for Making Advanced Smart Cards With Integrated Electronics Using Isotropic Thermoset Adhesive Materials With High Quality Exterior Surfaces
04/24/2008US20080096325 Chip packaging process
04/24/2008US20080096324 Electronic assemblies having a low processing temperature
04/24/2008US20080096323 Integrated circuit die/package interconnect
04/24/2008US20080096322 Manufacturing method of semiconductor chip
04/24/2008US20080096321 Semiconductor chip package manufacturing method and structure thereof
04/24/2008US20080096320 High density chip packages, methods of forming, and systems including same
04/24/2008US20080096319 Sawn power package and method of fabricating same
04/24/2008US20080096318 Method of connecting carrier tapes and tcp mounting apparatus used therefor
04/24/2008US20080096317 Method for producing portable memory devices
04/24/2008US20080096316 Stacked Die in Die BGA Package
04/24/2008US20080096315 Stacked chip package and method for forming the same