Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
04/2008
04/22/2008US7361287 Method for etching structures in an etching body by means of a plasma
04/22/2008US7361285 Method for fabricating cliche and method for forming pattern using the same
04/22/2008US7361234 Photolithographic stepper and/or scanner machines including cleaning devices and methods of cleaning photolithographic stepper and/or scanner machines
04/22/2008US7361230 Substrate processing apparatus
04/22/2008US7361229 Device for deposition with chamber cleaner and method for cleaning chamber
04/22/2008US7361228 Showerheads for providing a gas to a substrate and apparatus
04/22/2008US7361016 Temperature control assembly for use in etching processes and an associated retrofit method
04/22/2008US7360985 Wafer processing apparatus including clean box stopping mechanism
04/22/2008US7360981 Datum plate for use in installations of substrate handling systems
04/22/2008US7360953 Light guiding device
04/22/2008US7360907 Micro corner cube array, method of making the micro corner cube array, and display device
04/22/2008US7360679 Method for the production of a soldered connection
04/22/2008US7360546 Cleaning apparatus for semiconductor wafer
04/22/2008US7360463 Process condition sensing wafer and data analysis system
04/22/2008US7360346 Purging system and purging method for the interior of a portable type hermetically sealed container
04/22/2008US7360322 Non-contacting conveyance equipment
04/22/2008US7360309 Method of manufacturing microchannel heat exchangers
04/22/2008US7360273 Substrate cleaning device and substrate processing facility
04/17/2008WO2008045887A1 Die separation
04/17/2008WO2008045826A2 Method of arranging dies in a wafer for easy inkless partial wafer process
04/17/2008WO2008045764A1 De-fluoridation process
04/17/2008WO2008045707A1 Integrated circuit with back side conductive paths
04/17/2008WO2008045672A2 Method for fabricating conducting plates for a high-q mim capacitor
04/17/2008WO2008045669A1 High-temperature, spin-on, bonding compositions for temporary wafer bonding using sliding approach
04/17/2008WO2008045593A2 Dual-gate memory device and optimization of electrical interaction between front and back gates to enable scaling
04/17/2008WO2008045591A2 Low power rf tuning using optical and non-reflected power methods
04/17/2008WO2008045589A2 Dual-gate device and method
04/17/2008WO2008045422A2 Edge connect wafer level stacking
04/17/2008WO2008045202A2 Method to deposit conformal low temperature sio2
04/17/2008WO2008044843A1 Nanoscale multi-junction quantum dot device and fabrication method thereof
04/17/2008WO2008044840A2 Machining apparatus and semiconductor strip machining system using the same
04/17/2008WO2008044828A1 Single-electron logic transistor with dual gates operating at room temperature and the method thereof
04/17/2008WO2008044803A1 Method for manufacturing metal structure and carbon nano tube by using immersion plating
04/17/2008WO2008044801A1 Semiconductor device and method for manufacturing the same
04/17/2008WO2008044786A1 Machining end point detecting method, grinding method, and grinder
04/17/2008WO2008044778A1 Method for fabricating semiconductor chip
04/17/2008WO2008044757A1 Conductive film forming method, thin film transistor, panel with thin film transistor and thin film transistor manufacturing method
04/17/2008WO2008044741A1 Resist composition for use in lithography method utilizing electron beam, x-ray or euv light
04/17/2008WO2008044706A1 Sheet-like material conveying device
04/17/2008WO2008044655A1 Expander unit, and equipment for manufacturing electronic component including this expander unit
04/17/2008WO2008044633A1 Plasma etching device and plasma etching method
04/17/2008WO2008044602A1 Method for forming thin film and multilayer structure of thin film
04/17/2008WO2008044577A1 Film forming method and film forming apparatus
04/17/2008WO2008044559A1 Semiconductor device
04/17/2008WO2008044537A1 Semiconductor package and method for producing semiconductor package
04/17/2008WO2008044495A1 Cover body and substrate receiving container
04/17/2008WO2008044479A1 Electron beam lithography system and electron beam lithography
04/17/2008WO2008044478A1 Organic ruthenium compound for chemical vapor deposition, and chemical vapor deposition method using the organic ruthenium compound
04/17/2008WO2008044477A1 Aqueous dispersion for chemical mechanical polishing and chemical mechanical polishing method for semiconductor device
04/17/2008WO2008044394A1 Position adjusting method for laser beam emitting device
04/17/2008WO2008044381A1 Vibration sensor and method for manufacturing the vibration sensor
04/17/2008WO2008044357A1 Connected structure and method for manufacture thereof
04/17/2008WO2008044340A1 Substrate transfer apparatus
04/17/2008WO2008044327A1 Method for protecting wafer circuit surface and method for reducing wafer thickness
04/17/2008WO2008044326A1 Positive- or negative-working chemical amplification-type photoresist composition for low-temperature dry etching, and method for photoresist pattern formation using the same
04/17/2008WO2008044319A1 Euv light generating apparatus and euv exposure apparatus
04/17/2008WO2008044181A1 Method of forming an interconnect structure
04/17/2008WO2008043876A1 Method for measuring the active koh concentration in a koh etching process
04/17/2008WO2008043320A1 Method for generating a defined shrinkage behaviour of a section of a ceramic green film
04/17/2008WO2008030371A3 Implant at shallow trench isolation corner
04/17/2008WO2008028660A3 Device with pb-based high-k dielectric thin-film capacitor comprising pb-donating layers
04/17/2008WO2008027473A3 A transistor having a locally provided metal silicide region in contact areas and a method of forming the transistor
04/17/2008WO2008024932A3 Hotwall reactor and method for reducing particle formation in gan mocvd
04/17/2008WO2008024572A3 Superjunction trench device and method
04/17/2008WO2008023232A3 Buffer station for stocker system
04/17/2008WO2007148836A3 Electrode bonding method and part mounting apparatus
04/17/2008WO2007123762A3 Damage assessment of a wafer using optical metrology
04/17/2008WO2007117844A3 Semiconductor die packages using thin dies and metal substrates
04/17/2008WO2007117829A3 Method for bonding a semiconductor substrate to a metal substrate
04/17/2008WO2007112187A3 High density trench fet with integrated schottky diode and method of manufacture
04/17/2008WO2007109487A3 Semiconductor device incorporating fluorine into gate dielectric
04/17/2008WO2007109252A3 Method of plasma processing with in-situ monitoring and process parameter tuning
04/17/2008WO2007094984A3 SEALED ELASTOMER BONDED Si ELECTRODES AND THE LIKE FOR REDUCED PARTICLE CONTAMINATION IN DIELECTRIC ETCH
04/17/2008WO2007082933A3 Micromechanical placement system, and corresponding device
04/17/2008WO2006012626A3 Memory devices, transistors, memory cells, and methods of making same
04/17/2008US20080091979 Semiconductor memory device and test method
04/17/2008US20080090988 Method for handling polysilazane or polysilazane solution, polysilazane or polysilazane solution, and method for producing semiconductor device
04/17/2008US20080090501 Method and apparatus for dry-in, dry-out polishing and washing of a semiconductor device
04/17/2008US20080090500 Process for reducing dishing and erosion during chemical mechanical planarization
04/17/2008US20080090425 Two-step post nitridation annealing for lower EOT plasma nitrided gate dielectrics
04/17/2008US20080090424 Method of forming an oxinitride layer
04/17/2008US20080090423 Gas switching during an etch process to modulate the characteristics of the etch
04/17/2008US20080090422 Etching method
04/17/2008US20080090421 Forming a sacrificial layer in order to realise a suspended element
04/17/2008US20080090420 selectively etching anti-reflective multilayer using photoresist pattern as an etching mask, forming a fine pattern in a peripheral circuit region; improve the data processing speed
04/17/2008US20080090419 Method of forming a hard mask and method of forming a fine pattern of semiconductor device using the same
04/17/2008US20080090418 Method for forming fine patterns of a semiconductor device using double patterning
04/17/2008US20080090417 showerhead electrode assembly for processing semiconductor substrates; prevent aluminum fluoride formation; gas passages are positioned and sized such that they are misaligned at ambient temperature, concentric at high temperature; non-uniform shear stresses
04/17/2008US20080090416 Methods of etching polysilicon and methods of forming pluralities of capacitors
04/17/2008US20080090415 Substrate processing apparatus, method of manufacturing a semiconductor device, and method of forming a thin film on metal surface
04/17/2008US20080090414 Manufacture of electroless cobalt deposition compositions for microelectronics applications
04/17/2008US20080090413 Wafer via formation
04/17/2008US20080090412 Pre-silicide spacer removal
04/17/2008US20080090411 Method of manufacturing a semiconductor device
04/17/2008US20080090410 Semiconductor device having oxidized metal film and manufacture method of the same
04/17/2008US20080090409 Method for manufacturing a semiconductor device including interconnections having a smaller width
04/17/2008US20080090408 Methods for controlling the profile of a trench of a semiconductor structure
04/17/2008US20080090407 Terminal pad structures and methods of fabricating same
04/17/2008US20080090406 Via attached to a bond pad utilizing a tapered interconnect
04/17/2008US20080090405 Composite solder TIM for electronic package