Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2008
12/04/2008US20080296768 Copper nucleation in interconnects having ruthenium layers
12/04/2008US20080296767 Composition for cleaning semiconductor device
12/04/2008US20080296765 Semiconductor element and method of manufacturing the same
12/04/2008US20080296764 Enhanced copper posts for wafer level chip scale packaging
12/04/2008US20080296761 Cylindrical Bonding Structure and method of manufacture
12/04/2008US20080296760 Semiconductor apparatus and method for manufacturing same
12/04/2008US20080296759 Semiconductor packages
12/04/2008US20080296758 Protection and Connection of Devices Underneath Bondpads
12/04/2008US20080296754 Apparatus to minimize thermal impedance using copper on die backside
12/04/2008US20080296747 Micromechanical component having thin-layer encapsulation and production method
12/04/2008US20080296746 Lead frame and manufacturing method thereof, and semiconductor apparatus and manufacturing method thereof
12/04/2008US20080296743 Semiconductor device and method for fabricating the same
12/04/2008US20080296742 Semiconductor device, and method for fabricating thereof
12/04/2008US20080296740 Method of manufacturing semiconductor device, and semiconductor device
12/04/2008US20080296739 Method of forming a thin film structure and stack structure comprising the thin film
12/04/2008US20080296737 Methods for Manufacturing a Structure on or in a Substrate, Imaging Layer for Generating Sublithographic Structures, Method for Inverting a Sublithographic Pattern, Device Obtainable by Manufacturing a Structure
12/04/2008US20080296736 Method for reducing microloading in etching high aspect ratio structures
12/04/2008US20080296735 Semiconductor device and method of manufacturing the same
12/04/2008US20080296734 Microchip and method of manufacturing microchip
12/04/2008US20080296733 Semiconductor wafer assembly and method of processing semiconductor wafer
12/04/2008US20080296732 Methods of isolating array features during pitch doubling processes and semiconductor device structures having isolated array features
12/04/2008US20080296731 Enhanced on-chip decoupling capacitors and method of making same
12/04/2008US20080296729 Semiconductor device and method of manufacturing the same
12/04/2008US20080296728 Semiconductor structure for fuse and anti-fuse applications
12/04/2008US20080296726 Fuse Structure for Maintaining Passivation Integrity
12/04/2008US20080296725 Semiconductor component and method for fabricating the same
12/04/2008US20080296724 Semiconductor substrate and manufacturing method of semiconductor device
12/04/2008US20080296721 Junction Barrier Schottky Diode with Dual Silicides and Method of Manufacture
12/04/2008US20080296720 Backside-illuminated imaging device and manufacturing method of the same
12/04/2008US20080296717 Packages and assemblies including lidded chips
12/04/2008US20080296716 Sensor semiconductor device and manufacturing method thereof
12/04/2008US20080296712 Assembling Two Substrates by Molecular Adhesion
12/04/2008US20080296711 Magnetoelectronic device having enhanced permeability dielectric and method of manufacture
12/04/2008US20080296709 Chip assembly
12/04/2008US20080296708 Integrated sensor arrays and method for making and using such arrays
12/04/2008US20080296706 Cobalt disilicide structure
12/04/2008US20080296705 Gate and manufacturing method of gate material
12/04/2008US20080296704 Semiconductor device and manufacturing method thereof
12/04/2008US20080296703 Method for Producing a Field-Effect Transistor, Field-Effect Transistor and Integrated Circuit Arrangement
12/04/2008US20080296700 Method of forming gate patterns for peripheral circuitry and semiconductor device manufactured through the same method
12/04/2008US20080296698 Method for suppressing layout sensitivity of threshold voltage in a transistor array
12/04/2008US20080296696 Semiconductor Devices Including Doped Metal Silicide Patterns and Related Methods of Forming Such Devices
12/04/2008US20080296695 Semiconductor device and method of fabricating the same
12/04/2008US20080296694 Semiconductor Device with Field Plate and Method
12/04/2008US20080296693 Enhanced transistor performance of n-channel transistors by using an additional layer above a dual stress liner in a semiconductor device
12/04/2008US20080296692 Technique for strain engineering in silicon-based transistors by using implantation techniques for forming a strain-inducing layer under the channel region
12/04/2008US20080296690 Metal interconnect System and Method for Direct Die Attachment
12/04/2008US20080296682 Mos structures with remote contacts and methods for fabricating the same
12/04/2008US20080296681 Contact structure for finfet device
12/04/2008US20080296680 Method of making an integrated circuit including doping a fin
12/04/2008US20080296678 Method for fabricating high voltage drift in semiconductor device
12/04/2008US20080296677 Semiconductor device and method of manufacturing the same and data processing system
12/04/2008US20080296676 SOI FET With Source-Side Body Doping
12/04/2008US20080296674 Transistor, integrated circuit and method of forming an integrated circuit
12/04/2008US20080296673 Double gate manufactured with locos techniques
12/04/2008US20080296671 Semiconductor memory device, manufacturing method thereof, and data processing system
12/04/2008US20080296670 Semiconductor Devices Including Transistors Having a Recessed Channel Region and Methods of Fabricating the Same
12/04/2008US20080296668 Semiconductor device and method of manufacturing a semiconductor device
12/04/2008US20080296667 Semiconductor device and manufacturing method thereof
12/04/2008US20080296666 Semiconductor device including an embedded contact plug
12/04/2008US20080296665 Mask for manufacturing tft, tft, and manufacturing thereof
12/04/2008US20080296664 Integration of non-volatile charge trap memory devices and logic cmos devices
12/04/2008US20080296663 Semiconductor device and method of manufacturing the same
12/04/2008US20080296662 Discrete Trap Memory (DTM) Mediated by Fullerenes
12/04/2008US20080296661 Integration of non-volatile charge trap memory devices and logic cmos devices
12/04/2008US20080296659 Nand Flash Memory Array Having Pillar Structure and Fabricating Method of the Same
12/04/2008US20080296658 Process for manufacturing a memory device integrated on a semiconductor substrate and comprising nanocristal memory cells and cmos transistors
12/04/2008US20080296657 Non-Volatile Memory Devices and Methods of Manufacturing Non-Volatile Memory Devices
12/04/2008US20080296655 Multi-time programmable memory and method of manufacturing the same
12/04/2008US20080296652 Split gate flash memory cell with ballistic injection
12/04/2008US20080296650 High-k dielectrics with gold nano-particles
12/04/2008US20080296649 Semiconductor device employing buried insulating layer and method of fabricating the same
12/04/2008US20080296648 Fin memory structure and method for fabrication thereof
12/04/2008US20080296647 Semiconductor memory device and manufacturing method thereof
12/04/2008US20080296646 Semiconductor memory device and method for fabricating the same
12/04/2008US20080296645 Solid-state imaging device and manufacturing method thereof
12/04/2008US20080296644 Cmos image sensors and methods of fabricating same
12/04/2008US20080296640 Solid-state image pickup device, method for making same, and image pickup apparatus
12/04/2008US20080296638 Semiconductor device and method of manufacturing the same
12/04/2008US20080296637 Semiconductor device and method of manufacturing the same
12/04/2008US20080296636 Devices and integrated circuits including lateral floating capacitively coupled structures
12/04/2008US20080296635 Semiconductor device with strain
12/04/2008US20080296632 Stress-Enhanced Performance Of A FinFet Using Surface/Channel Orientations And Strained Capping Layers
12/04/2008US20080296631 Metal-oxide-semiconductor transistor and method of forming the same
12/04/2008US20080296628 Semiconductor integrated circuit and method for manufacturing same
12/04/2008US20080296627 Nitride semiconductor device and method of manufacturing the same
12/04/2008US20080296626 Nitride substrates, thin films, heterostructures and devices for enhanced performance, and methods of making the same
12/04/2008US20080296625 Gallium nitride-on-silicon multilayered interface
12/04/2008US20080296624 Semiconductor device and manufacturing method thereof
12/04/2008US20080296623 Bipolar transistor and method for making same
12/04/2008US20080296622 BURIED CHANNEL MOSFET USING III-V COMPOUND SEMICONDUCTORS AND HIGH k GATE DIELECTRICS
12/04/2008US20080296620 Electronic device including a semiconductor fin and a process for forming the electronic device
12/04/2008US20080296619 Adhesive bonding with low temperature grown amorphous or polycrystalline compound semiconductors
12/04/2008US20080296618 P-GaN/AlGaN/AlN/GaN ENHANCEMENT-MODE FIELD EFFECT TRANSISTOR
12/04/2008US20080296617 METHOD USING LOW TEMPERATURE WAFER BONDING TO FABRICATE TRANSISTORS WITH HETEROJUNCTIONS OF Si(Ge) TO III-N MATERIALS
12/04/2008US20080296616 Gallium nitride-on-silicon nanoscale patterned interface
12/04/2008US20080296612 Method of producing a vertically inhomogeneous platinum or gold distribution in a semiconductor substrate and in a semiconductor device
12/04/2008US20080296611 Semiconductor device and method for manufacturing same
12/04/2008US20080296609 Nitride Semiconductor Device Comprising Bonded Substrate and Fabrication Method of the Same
12/04/2008US20080296607 Environmentally robust lighting devices and methods of manufacturing same
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