Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2008
12/18/2008WO2008152719A1 Process for producing semiconductor device and semiconductor device
12/18/2008WO2008152716A1 Method of washing object and object washing system
12/18/2008WO2008152281A2 Field effect transistor with carbon nanotubes
12/18/2008WO2008152126A1 Device for coating substrates disposed on a susceptor
12/18/2008WO2008152026A2 Vertical current controlled silicon on insulator (soi) device and method of forming same
12/18/2008WO2008151952A1 Wire clamp for a wire bonder
12/18/2008WO2008151918A1 A process for polishing patterned and unstructured surfaces of materials and an aqueous polishing agent to be used in the said process
12/18/2008WO2008151429A1 Anti-fuse memory cell
12/18/2008WO2008151354A1 Method of fabrication mems integrated circuits
12/18/2008WO2008131395A3 Solder bump interconnect for improved mechanical and thermo mechanical performance
12/18/2008WO2008131280A3 Ablation device
12/18/2008WO2008129424A3 Ultra-thin stacked chios packaging
12/18/2008WO2008128122A3 Formation of photovoltaic absorber layers on foil substrates
12/18/2008WO2008127643A3 Strain enhanced semiconductor devices and methods for their fabrication
12/18/2008WO2008127484A3 Structure and method for dual work function metal gate electrodes by control of interface dipoles
12/18/2008WO2008127469A3 A novel fabrication technique for high frequency, high power group iii nitride electronic devices
12/18/2008WO2008121326A3 An soi transistor having drain and source regions of reduced length and a stressed dielectric material adjacent thereto
12/18/2008WO2008109504A3 Processing system and method for performing high throughput non-plasma processing
12/18/2008WO2008105790A3 Ultrasonically enhanced fuel cell systems and methods of use
12/18/2008WO2008095526A3 Method for applying a structure to a semiconductor element
12/18/2008WO2008051324A3 Semiconductor wafer suitable for forming a semiconductor junction diode device and method of forming same
12/18/2008WO2008005892A3 Nanocrystal formation
12/18/2008WO2007146803B1 Methods and apparatus for preventing plasma un-confinement events in a plasma processing chamber
12/18/2008WO2007139681A9 Power mosfet contact metallization
12/18/2008WO2007030596A3 Printed circuit board
12/18/2008US20080313515 System-on-chip (soc) having built-in-self-test circuits and a self-test method of the soc
12/18/2008US20080312088 Field effect transistor, logic circuit including the same and methods of manufacturing the same
12/18/2008US20080311823 Apparatus for heating or cooling a polishing surface of a polishing appratus
12/18/2008US20080311762 Semiconductor device surface roughness reduction
12/18/2008US20080311761 Method for the Thermal Treatment of Disk-Shaped Substrates
12/18/2008US20080311760 Film formation method and apparatus for semiconductor process
12/18/2008US20080311759 Semiconductor device and method of fabricating the same
12/18/2008US20080311758 Methods of and apparatus for protecting a region of process exlusion adjacent to a region of process performance in a process chamber
12/18/2008US20080311757 System and method for chemical dry etching system
12/18/2008US20080311756 Method for Fabricating Low-k Dielectric and Cu Interconnect
12/18/2008US20080311755 Method for treating a dielectric film to reduce damage
12/18/2008US20080311754 Low temperature sacvd processes for pattern loading applications
12/18/2008US20080311753 Oxygen sacvd to form sacrifical oxide liners in substrate gaps
12/18/2008US20080311752 Pore Sealing and Cleaning Porous Low Dielectric Constant Structures
12/18/2008US20080311751 Method for Etching a Layer on a Substrate
12/18/2008US20080311750 Polishing composition for semiconductor wafer and polishing method
12/18/2008US20080311749 Dielectric trenches, nickel/tantalum oxide structures, and chemical mechanical polishing techniques
12/18/2008US20080311748 Semiconductor integrated circuit, semiconductor device, and manufacturing method of the semiconductor integrated circuit
12/18/2008US20080311747 Metal-germanium physical vapor deposition for semiconductor device defect reduction
12/18/2008US20080311746 New metal precursors for semiconductor applications
12/18/2008US20080311745 High Temperature Processing Compatible Metal Gate Electrode For pFETS and Methods For Fabrication
12/18/2008US20080311744 MULTILAYER HARDMASK SCHEME FOR DAMAGE-FREE DUAL DAMASCENE PROCESSING OF SiCOH DIELECTRICS
12/18/2008US20080311743 Method of fabricating opening and plug
12/18/2008US20080311742 Manufacturing method of semiconductor device
12/18/2008US20080311741 Selective W-Cvd Method and Method for Forming Multi-Layered Cu Electrical Interconnection
12/18/2008US20080311740 Power composite integrated semiconductor device and manufacturing method thereof
12/18/2008US20080311739 Method of Forming a Self Aligned Copper Capping Layer
12/18/2008US20080311738 Method of forming an interconnect joint
12/18/2008US20080311737 Manufacturing method for semiconductor device containing stacked semiconductor chips
12/18/2008US20080311736 Methods of forming ohmic layers through ablation capping layers
12/18/2008US20080311735 Method for fabricating semiconductor device
12/18/2008US20080311734 Semiconductor storage device and manufacturing method thereof
12/18/2008US20080311733 Method for fabricating semiconductor device with gate line of fine line width
12/18/2008US20080311732 Method for Forming Non-Amorphous, Ultra-Thin Semiconductor Devices Using Sacrificial Implantation Layer
12/18/2008US20080311731 Low pressure chemical vapor deposition of polysilicon on a wafer
12/18/2008US20080311730 Semiconductor device and method of forming gate thereof
12/18/2008US20080311729 Atmospheric Pressure Chemical Vapor Deposition
12/18/2008US20080311728 Method for recovering damage of low dielectric insulating film and method for manufacturing semiconductor device
12/18/2008US20080311727 Method of cutting a wafer
12/18/2008US20080311726 Manufacturing method of SOI substrate
12/18/2008US20080311725 Method For Assembling Substrates By Depositing An Oxide Or Nitride Thin Bonding Layer
12/18/2008US20080311724 Tfd lcd panel
12/18/2008US20080311723 Tunable semiconductor diodes
12/18/2008US20080311722 Method for forming polycrystalline thin film bipolar transistors
12/18/2008US20080311721 Semiconductor device manufacture method including process of implanting impurity into gate electrode independently from source/drain and semiconductor device manufactured by the method
12/18/2008US20080311720 Short channel effect of MOS devices by retrograde well engineering using tilted dopant implantation into recessed source/drain regions
12/18/2008US20080311719 Method Of Forming A Field Effect Transistor
12/18/2008US20080311718 Manufacturing method of semiconductor device
12/18/2008US20080311717 Fabrication of semiconductor architecture having field-effect transistors especially suitable for analog applications
12/18/2008US20080311716 Methods for forming field effect transistors and epi-substrate
12/18/2008US20080311715 Method for forming semiconductor device
12/18/2008US20080311714 Semiconductor structure and method of manufacture
12/18/2008US20080311713 Mobility enhancement by strained channel cmosfet with single workfunction metal-gate and fabrication method thereof
12/18/2008US20080311712 Insulated gate silicon nanowire transistor and method of manufacture
12/18/2008US20080311711 Gapfill for metal contacts
12/18/2008US20080311710 Method to form low-defect polycrystalline semiconductor material for use in a transistor
12/18/2008US20080311709 Method for manufacturing semiconductor device
12/18/2008US20080311708 Hybrid strained orientated substrates and devices
12/18/2008US20080311707 Process for producing a functional device-mounted module
12/18/2008US20080311706 Method for manufacturing semiconductor device
12/18/2008US20080311705 Lead frame and method for fabricating semiconductor package employing the same
12/18/2008US20080311704 Radio frequency identification (rfid) tag lamination process using liner
12/18/2008US20080311703 Lead frame and a method of manufacturing the same
12/18/2008US20080311702 Methods for stacking wire-bonded integrated circuit dice on flip-chip bonded integrated circuit dice
12/18/2008US20080311701 Method for fabricating semiconductor package
12/18/2008US20080311700 Plastic overmolded packages with mechancially decoupled lid attach attachment
12/18/2008US20080311699 Phase-change memory and fabrication method thereof
12/18/2008US20080311697 Method For Simultaneous Recrystallization and Doping of Semiconductor Layers and Semiconductor Layer Systems Produced According to This Method
12/18/2008US20080311693 Method of Aligning Optical Components With Waveguides
12/18/2008US20080311692 Top Emission Organic Light Emitting Diode Display Using Auxiliary Electrode to Prevent Voltage Drop of Upper Electrode and Method of Fabricating the Same
12/18/2008US20080311690 Eliminate release etch attack by interface modification in sacrificial layers
12/18/2008US20080311689 Securing a transistor outline can within an optical component
12/18/2008US20080311688 Method and Apparatus for Creating a Gate Optimization Evaluation Library
12/18/2008US20080311687 Method and Apparatus for Optimizing a Gate Channel
12/18/2008US20080311686 Method of Forming Semiconductor Layers on Handle Substrates
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