Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2008
12/18/2008US20080311685 Methods relating to the reconstruction of semiconductor wafers for wafer level processing
12/18/2008US20080311684 Programmable Chip Enable and Chip Address in Semiconductor Memory
12/18/2008US20080311683 Semiconductor device manufacturing method
12/18/2008US20080311682 Microwave integrated circuit package and method for forming such package
12/18/2008US20080311526 Method for a multiple exposure, microlithography projection exposure installation and a projection system
12/18/2008US20080311487 Glass substrate for mask blank and method of polishing for producing the same
12/18/2008US20080311486 Photomask manufacturing method and semiconductor device manufacturing method
12/18/2008US20080311393 Substrate for epitaxy and method of preparing the same
12/18/2008US20080311337 Substrates coated with organosiloxane nanofibers, methods for their preparation, uses and reactions thereof
12/18/2008US20080311286 Thermal Treatment Equipment and Method for Heat-Treating
12/18/2008US20080311024 Diamond single crystal substrate manufacturing method and diamond single crystal substrate
12/18/2008US20080311019 Apparatus for pulling single crystal by CZ method
12/18/2008US20080310939 System and method for use in a lithography tool
12/18/2008US20080310938 Apparatus for Producing Ic Chip Package
12/18/2008US20080310927 Method and Device for Extracting Electronic Components From Tubes and Electronic Component Feeding Device
12/18/2008US20080310854 Connected body and optical transceiver module
12/18/2008US20080310472 Laser diode chip and its production method
12/18/2008US20080310471 Semiconductor laser device and method of manufacturing the same
12/18/2008US20080310470 Broadband semiconductor laser
12/18/2008US20080310233 Multiple select gates with non-volatile memory cells
12/18/2008US20080310213 Method and system for providing spin transfer tunneling magnetic memories utilizing non-planar transistors
12/18/2008US20080310209 Circuit, biasing scheme and fabrication method for diode accesed cross-point resistive memory array
12/18/2008US20080309950 Calibrating A Lithographic Apparatus
12/18/2008US20080309902 detection of nucleic acid derived from mutant oncogenes or other tumor-associated DNA; detection, identification, or monitoring of the existence, progression or clinical status of neoplasia in humans or other animals that contain a mutation that is associated with the neoplasm
12/18/2008US20080309841 Active matrix substrate and display device
12/18/2008US20080309839 Thin film transistor array panel and liquid crystal display including the panel
12/18/2008US20080309585 Method of manufacturing a semiconductor device
12/18/2008US20080309332 Microchip Assembly With Short-Distance Interaction
12/18/2008US20080309314 Voltage regulator and method of manufacturing the same
12/18/2008US20080308954 Semiconductor device and method of forming the same
12/18/2008US20080308952 Method for Reliably Positioning Solder on a Die Pad for Attaching a Semiconductor Chip to the Die Pad and Molding Die for Solder Dispensing Apparatus
12/18/2008US20080308951 Semiconductor package and fabrication method thereof
12/18/2008US20080308950 Semiconductor package and method for manufacturing thereof
12/18/2008US20080308949 Flip chip package and method for manufacturing the same
12/18/2008US20080308948 Wafer-to-wafer alignments
12/18/2008US20080308947 Die offset die to die bonding
12/18/2008US20080308946 Semiconductor assemblies, stacked semiconductor devices, and methods of manufacturing semiconductor assemblies and stacked semiconductor devices
12/18/2008US20080308944 Method for eliminating duo loading effect using a via plug
12/18/2008US20080308943 Wiring structure and semiconductor device, and their fabrication methods
12/18/2008US20080308942 novolak resin, polybenzocyclobutene, polyhydroxystyrene, polyacrylate, polymethacrylate, alicyclic polymer, and epoxy resin; integrated circuits; semiconductors
12/18/2008US20080308939 Semiconductor device and method for fabricating semiconductor device
12/18/2008US20080308938 Under bump metallurgy structure and wafer structure using the same and method of manufacturing wafer structure
12/18/2008US20080308937 Copper-free semiconductor device interface and methods of fabrication and use thereof
12/18/2008US20080308935 Semiconductor chip package, semiconductor package including semiconductor chip package, and method of fabricating semiconductor package
12/18/2008US20080308933 Integrated circuit package system with different connection structures
12/18/2008US20080308931 Electronic Structures Including Barrier Layers Defining Lips
12/18/2008US20080308930 Semiconductor device mounting structure, manufacturing method, and removal method of semiconductor device
12/18/2008US20080308929 Semiconductor device, chip package and method of fabricating the same
12/18/2008US20080308926 Heat dissipation package structure and method for fabricating the same
12/18/2008US20080308925 Fabricating process and structure of thermal enhanced substrate
12/18/2008US20080308922 Method for packaging semiconductors at a wafer level
12/18/2008US20080308921 Molded reconfigured wafer, stack package using the same, and method for manufacturing the stack package
12/18/2008US20080308920 System and method of fabricating micro cavities
12/18/2008US20080308919 Hollow sealing structure and manufacturing method for hollow sealing structure
12/18/2008US20080308917 Embedded chip package
12/18/2008US20080308912 Emi shielded semiconductor package
12/18/2008US20080308911 Semiconductor device and manufacturing method thereof
12/18/2008US20080308909 Epitaxial wafers, method for manufacturing of epitaxial wafers, method of suppressing bowing of these epitaxial wafers and semiconductor multilayer structures using these epitaxial wafers
12/18/2008US20080308908 Nitride semiconductor device and method for producing nitride semiconductor device
12/18/2008US20080308907 PLANAR NONPOLAR m-PLANE GROUP III NITRIDE FILMS GROWN ON MISCUT SUBSTRATES
12/18/2008US20080308906 GaN SUBSTRATE, SUBSTRATE WITH EPITAXIAL LAYER, SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING GaN SUBSTRATE
12/18/2008US20080308905 Semi-conductor device, and method of making the same
12/18/2008US20080308904 P-doped region with improved abruptness
12/18/2008US20080308902 Semiconductor device
12/18/2008US20080308901 Integrated circuit having a thin passivation layer that facilitates laser programming, and applications thereof
12/18/2008US20080308898 Plasma Excited Chemical Vapor Deposition Method Silicon/Oxygen/Nitrogen-Containing-Material and Layered Assembly
12/18/2008US20080308897 Substrate for manufacturing semiconductor device and manufacturing method thereof
12/18/2008US20080308896 Integrated circuit device comprising a gate electrode structure and corresponding method of fabrication
12/18/2008US20080308891 Ultra low dark current pin photodetector
12/18/2008US20080308885 Magnetic random access memory and fabricating method thereof
12/18/2008US20080308884 Fabrication of Inlet and Outlet Connections for Microfluidic Chips
12/18/2008US20080308883 Monitoring pattern for silicide
12/18/2008US20080308881 Method for Controlled Formation of a Gate Dielectric Stack
12/18/2008US20080308879 Mos structures with contact projections for lower contact resistance and methods for fabricating the same
12/18/2008US20080308876 Semiconductor device and method of manufacturing the same
12/18/2008US20080308875 Mask rom device, semiconductor device including the mask rom device, and methods of fabricating mask rom device and semiconductor device
12/18/2008US20080308874 Complementary Asymmetric High Voltage Devices and Method of Fabrication
12/18/2008US20080308872 Cmos transistors with differential oxygen content high-k dielectrics
12/18/2008US20080308868 High voltage metal oxide semiconductor transistor and fabrication method thereof
12/18/2008US20080308867 Partially depleted soi field effect transistor having a metallized source side halo region
12/18/2008US20080308866 Semiconductor Device and Method for Manufacturing the Same
12/18/2008US20080308865 Semiconductor device and method for manufacturing the same
12/18/2008US20080308864 Asymmetrical mos transistor and fabrication method thereof and devices using the same
12/18/2008US20080308863 Semiconductor device and method of manufacturing the same
12/18/2008US20080308862 Mos Transistor and Method of Manufacturing a Mos Transistor
12/18/2008US20080308861 Dual gate finfet
12/18/2008US20080308860 Method of forming a pattern for a semiconductor device, method of forming a charge storage pattern using the same method, non-volatile memory device and methods of manufacturing the same
12/18/2008US20080308859 Semiconductor device and method for manufacturing the same
12/18/2008US20080308858 Semiconductor devices and electronic systems comprising floating gate transistors and methods of forming the same
12/18/2008US20080308857 Systems and Methods for Self Convergence During Erase of a Non-Volatile Memory Device
12/18/2008US20080308856 Integrated Circuit Having a Fin Structure
12/18/2008US20080308855 Memory devices with isolation structures and methods of forming and programming the same
12/18/2008US20080308854 Semiconductor memory device and fabrication method thereof
12/18/2008US20080308853 Tunnel transistor having spin-dependent transfer characteristics and non-volatile memory using the same
12/18/2008US20080308850 Transistor with reduced charge carrier mobility and associated methods
12/18/2008US20080308847 Method of making (100) nmos and (110) pmos sidewall surface on the same fin orientation for multiple gate mosfet with dsb substrate
12/18/2008US20080308846 Device and method for detecting biomolecules using adsorptive medium and field effect transistor
12/18/2008US20080308845 Heterogeneous Group IV Semiconductor Substrates
12/18/2008US20080308841 Semiconductor Substrate, Semiconductor Device and Method of Manufacturing a Semiconductor Substrate
12/18/2008US20080308838 Power switching transistors