Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2009
10/14/2009CN100549894C Ozonated water flow and concentration control apparatus and method
10/14/2009CN100549893C 排气装置压力控制系统 Exhaust pressure control system
10/14/2009CN100549839C Substrate heating apparatus and method and coating and developing system
10/14/2009CN100549838C Liquid processing method and device thereof
10/14/2009CN100549835C Exposure device, exposure method, and micro device manufacturing method
10/14/2009CN100549833C Level sensor, lithographic apparatus and device manufacturing method
10/14/2009CN100549831C Substrate possessing multiple circuit patterns and its manufacture method
10/14/2009CN100549829C Chemical amplification type positive resist composition
10/14/2009CN100549828C Positive photosensitive resin composition
10/14/2009CN100549824C Etching composition and etching processing method
10/14/2009CN100549821C Method for producing a unit having a three-dimensional surface patterning, and use of this method
10/14/2009CN100549820C Method for forming dual damascene with improved etch profiles
10/14/2009CN100549818C Substrate for special micro-optical-etching
10/14/2009CN100549791C Method for making array base plate
10/14/2009CN100549754C Micro-oscillating element and method of making the same
10/14/2009CN100549680C Method and system for producing solar battery
10/14/2009CN100549668C Laser beam machine
10/14/2009CN100549618C Defect detector, defect detecting method and method for detecting hole figure
10/14/2009CN100549606C Drying apparatus
10/14/2009CN100549243C Method for epitaxial growing AlxGa1-xN single crystal film on saphire lining bottom material
10/14/2009CN100549242C Growth device for preparing IV-VI species semiconductor single-crystal thin film
10/14/2009CN100549236C Cleaning liquid of semiconductor chip after chemical mechanical grind
10/14/2009CN100549225C Cooling device, and apparatus and method for manufacturing image display panel using cooling device
10/14/2009CN100549155C Semiconductor process residue removal composition
10/14/2009CN100549121C Chemical machinery grinding composition
10/14/2009CN100548871C 3 D semiconductor nano structured array, and preparation method
10/14/2009CN100548589C Calibration method
10/14/2009CN100548581C Polishing pad, polishing system and manufacturing method of polishing pad
10/14/2009CN100548576C 抛光垫和化学机械抛光方法 Chemical mechanical polishing pad and polishing method
10/14/2009CN100548564C Laser machining method and semiconductor device
10/13/2009US7603648 Mask design using library of corrections
10/13/2009US7603248 Testing circuit and testing method for semiconductor device and semiconductor chip
10/13/2009US7603196 Methods and apparatus for material control system interface
10/13/2009US7603195 Methods and apparatus for integrating large and small lot electronic device fabrication facilities
10/13/2009US7603194 Fabrication system and fabrication method
10/13/2009US7602665 Semiconductor integrated circuit device
10/13/2009US7602503 Methods for measuring a wavefront of an optical system
10/13/2009US7602484 Method and apparatus for performing limited area spectral analysis
10/13/2009US7602476 Substrate-holding technique
10/13/2009US7602273 Semiconductor device, method of manufacturing the same, and electronic device
10/13/2009US7602111 Plasma accelerating apparatus and plasma processing system including secondary electron amplification coating layer formed at inner wall of channel
10/13/2009US7602091 Positioning apparatus and exposure apparatus
10/13/2009US7602072 Substrate having alignment marks and method of obtaining alignment information using the same
10/13/2009US7602070 Room temperature metal direct bonding
10/13/2009US7602066 Method of filling structures for forming via-first dual damascene interconnects
10/13/2009US7602062 Package substrate with dual material build-up layers
10/13/2009US7602061 Semiconductor device and method for manufacturing semiconductor device
10/13/2009US7602060 Heat spreader in a flip chip package
10/13/2009US7602053 Leadframe of a leadless flip-chip package and method for manufacturing the same
10/13/2009US7602048 Semiconductor device and semiconductor wafer having a multi-layered insulation film
10/13/2009US7602046 Recycling by mechanical means of a wafer comprising a multilayer structure after taking-off a thin layer thereof
10/13/2009US7602041 Input protection circuit preventing electrostatic discharge damage of semiconductor integrated circuit
10/13/2009US7602038 Damascene structure having a reduced permittivity and manufacturing method thereof
10/13/2009US7602025 High voltage semiconductor device and method of manufacture thereof
10/13/2009US7602024 Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology
10/13/2009US7602023 Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology
10/13/2009US7602021 Method and structure for strained FinFET devices
10/13/2009US7602020 Semiconductor device and method for forming the same
10/13/2009US7602018 High withstand-voltage semiconductor device
10/13/2009US7602016 Semiconductor apparatus and method of manufacturing the same
10/13/2009US7602014 Superjunction power MOSFET
10/13/2009US7602007 Semiconductor device having controllable transistor threshold voltage
10/13/2009US7602002 Semiconductor device with DRAM portion having capacitor-over-bit-line structure and logic portion
10/13/2009US7602001 Capacitorless one transistor DRAM cell, integrated circuitry comprising an array of capacitorless one transistor DRAM cells, and method of forming lines of capacitorless one transistor DRAM cells
10/13/2009US7601994 Display device and method for manufacturing the same
10/13/2009US7601986 Epitaxial semiconductor structures having reduced stacking fault nucleation sites
10/13/2009US7601976 Dual beam system
10/13/2009US7601942 Optoelectronic device having an array of smart pixels
10/13/2009US7601941 Method and apparatus for evaluating solar cell and use thereof
10/13/2009US7601933 Heat processing apparatus and heat processing method
10/13/2009US7601652 Method for treating substrates and films with photoexcitation
10/13/2009US7601651 Method to improve the step coverage and pattern loading for dielectric films
10/13/2009US7601650 Carbon nanotube device and process for manufacturing same
10/13/2009US7601649 Zirconium-doped tantalum oxide films
10/13/2009US7601648 Method for fabricating an integrated gate dielectric layer for field effect transistors
10/13/2009US7601647 Method of forming fine patterns of semiconductor device using double patterning
10/13/2009US7601646 Top-oxide-early process and array top oxide planarization
10/13/2009US7601645 Methods for fabricating device features having small dimensions
10/13/2009US7601644 Method for manufacturing silicon wafers
10/13/2009US7601643 Polishing a semiconductor wafer with a polishing pad and disposing a volume of a nonaqueous solvent onto the semiconductor wafer; chemical mechanical polishing to rinse
10/13/2009US7601642 Simplifies the steps, reduces the risk of contamination due to metal impurities which may result from alkaline cleaning; characterized by its including a beveling step between the slicing step and the lapping step in which a wafer is immersed in acidic solution of hydrofluoric acid and nitric acid
10/13/2009US7601641 Two step optical planarizing layer etch
10/13/2009US7601640 Method of manfacturing semiconductor device
10/13/2009US7601639 Method for conditioning a microelectronics device deposition chamber
10/13/2009US7601638 Interconnect metallization method having thermally treated copper plate film with reduced micro-voids
10/13/2009US7601637 Atomic layer deposited tantalum containing adhesion layer
10/13/2009US7601635 Method of manufacturing a semiconductor device
10/13/2009US7601634 Process for producing a contact pad on a region of an integrated circuit, in particular on the electrodes of a transistor
10/13/2009US7601633 Semiconductor device and method for fabricating the same
10/13/2009US7601632 Method of forming a metal line of a semiconductor device
10/13/2009US7601631 Very low dielectric constant plasma-enhanced CVD films
10/13/2009US7601630 Semiconductor device and method for fabricating the same
10/13/2009US7601629 Semiconductive device fabricated using subliming materials to form interlevel dielectrics
10/13/2009US7601628 Wire and solder bond forming methods
10/13/2009US7601627 Method for reduction of soft error rates in integrated circuits
10/13/2009US7601626 Method for manufacturing semiconductor device, and method and structure for implementing semiconductor device
10/13/2009US7601625 Method for manufacturing semiconductor device having solder layer
10/13/2009US7601624 Device comprising an ohmic via contact, and method of fabricating thereof
10/13/2009US7601623 Method of manufacturing a semiconductor device with a gate electrode having a laminate structure
10/13/2009US7601622 Method of forming fine patterns in semiconductor device and method of forming gate using the same
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