Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2009
10/20/2009US7605416 Thin film translator array panel and a method for manufacturing the panel
10/20/2009US7605412 Distributed high voltage JFET
10/20/2009US7605401 Semiconductor device and fabrication method thereof
10/20/2009US7605396 Field effect type organic transistor and process for production t hereof
10/20/2009US7605392 Field effect transistor and production process thereof
10/20/2009US7605383 Pattern writing apparatus using charged particle beam, and program-recorded readable recording medium
10/20/2009US7605381 Charged particle beam alignment method and charged particle beam apparatus
10/20/2009US7605350 System for two-step resist soft bake to prevent ILD outgassing during semiconductor processing
10/20/2009US7605344 Laser beam machining method, laser beam machining apparatus, and laser beam machining product
10/20/2009US7605328 Photovoltaic thin-film cell produced from metallic blend using high-temperature printing
10/20/2009US7605113 Aqueous cleaning composition containing copper-specific corrosion inhibitor for cleaning inorganic residues on semiconductor substrate
10/20/2009US7605095 Heat processing method and apparatus for semiconductor process
10/20/2009US7605094 Method of forming metal oxide using an atomic layer deposition process
10/20/2009US7605093 Method of fabricating iridium-based materials and structures on substrates, and iridium source reagents therefor
10/20/2009US7605092 Passive elements, articles, packages, semiconductor composites, and methods of manufacturing same
10/20/2009US7605091 Etchant for conductive materials and method of manufacturing a thin film transistor array panel using the same
10/20/2009US7605090 Process for producing sublithographic structures
10/20/2009US7605089 Method of manufacturing an electronic device
10/20/2009US7605088 Method of uniformly etching refractory metals, refractory metal alloys and refractory metal silicides
10/20/2009US7605087 Methods of forming semiconductor devices using di-block polymer layers
10/20/2009US7605086 Plasma spraying liquid crystalline polymer on surface of component by feeding liquid crystalline polymer powder into plasma flame to form molten or heat-softened particles, where liquid crystalline polymer particles form plasma sprayed coating on outermost surface of component; minimizes contamination
10/20/2009US7605085 Method of manufacturing interconnecting structure with vias
10/20/2009US7605084 Method of gap-filling using amplitude modulation radio frequency power
10/20/2009US7605083 Formation of composite tungsten films
10/20/2009US7605082 Capping before barrier-removal IC fabrication method
10/20/2009US7605081 Sub-lithographic feature patterning using self-aligned self-assembly polymers
10/20/2009US7605080 Semiconductor device and method of manufacturing the same
10/20/2009US7605079 Manufacturing method for phase change RAM with electrode layer process
10/20/2009US7605078 Integration of a variable thickness copper seed layer in copper metallization
10/20/2009US7605077 Dual metal integration scheme based on full silicidation of the gate electrode
10/20/2009US7605076 Method of manufacturing a semiconductor device from which damage layers and native oxide films in connection holes have been removed
10/20/2009US7605075 Multilayer circuit board and method of manufacturing the same
10/20/2009US7605074 Chemical mechanical polishing and method for manufacturing semiconductor device using the same
10/20/2009US7605073 Sealants for metal interconnect protection in microelectronic devices having air gap interconnect structures
10/20/2009US7605072 Interconnect structure with a barrier-redundancy feature
10/20/2009US7605071 Controlling lateral distribution of air gaps in interconnects
10/20/2009US7605070 Semiconductor device having contact plug formed in double structure by using epitaxial stack and metal layer and method for fabricating the same
10/20/2009US7605069 Method for fabricating semiconductor device with gate
10/20/2009US7605068 Semiconductor device having a silicide layer and manufacturing method thereof
10/20/2009US7605067 Method of manufacturing non-volatile memory device
10/20/2009US7605066 Method for realizing an electric linkage in a semiconductor electronic device between a nanometric circuit architecture and standard electronic components
10/20/2009US7605065 Schottky barrier tunnel single electron transistor and method of manufacturing the same
10/20/2009US7605064 Selective laser annealing of semiconductor material
10/20/2009US7605063 Photoresist stripping chamber and methods of etching photoresist on substrates
10/20/2009US7605062 Doped nanoparticle-based semiconductor junction
10/20/2009US7605061 Semiconductor device and method of manufacturing the semiconductor device
10/20/2009US7605060 Method of epitaxial deoposition of an n-doped silicon layer
10/20/2009US7605059 Semiconductor device and method of manufacturing the semiconductor device
10/20/2009US7605058 Wafer dividing method
10/20/2009US7605057 Semiconductor device and manufacturing method thereof
10/20/2009US7605055 Wafer with diamond layer
10/20/2009US7605054 Method of forming a device wafer with recyclable support
10/20/2009US7605053 Glass-based SOI structures
10/20/2009US7605052 Method of forming an integrated circuit having a device wafer with a diffused doped backside layer
10/20/2009US7605051 Method for forming internal electrode pattern and method for manufacturing multilayer ceramic electronic component using same
10/20/2009US7605050 Method of bonding a polymer surface to a conducting or semiconducting surface and application of the same
10/20/2009US7605049 Optical semiconductor device and manufacturing method for same
10/20/2009US7605048 Method for forming a capacitor having a copper electrode and a high surface area aluminum inner layer
10/20/2009US7605047 Method for the integration of two bipolar transistors in a semiconductor body, semiconductor arrangement in a semiconductor body, and cascode circuit
10/20/2009US7605046 Active matrix structure for a display device and method for its manufacture
10/20/2009US7605045 Field effect transistors and methods for fabricating the same
10/20/2009US7605044 Method of manufacturing semiconductor device
10/20/2009US7605043 Semiconductor device and manufacturing method for the same
10/20/2009US7605042 SOI bottom pre-doping merged e-SiGe for poly height reduction
10/20/2009US7605041 Semiconductor device and its manufacture method
10/20/2009US7605040 Method of forming high breakdown voltage low on-resistance lateral DMOS transistor
10/20/2009US7605039 Multiple-gate MOS transistor using Si substrate and method of manufacturing the same
10/20/2009US7605038 Semiconductor device and manufacturing method thereof
10/20/2009US7605037 Manufacturing method for an integrated semiconductor memory device and corresponding semiconductor memory device
10/20/2009US7605036 Method of forming floating gate array of flash memory device
10/20/2009US7605035 Method of fabricating semiconductor device by exposing upper sidewalls of contact plug to form charge storage electrode
10/20/2009US7605034 Integrated circuit memory cells and methods of forming
10/20/2009US7605033 Low resistance peripheral local interconnect contacts with selective wet strip of titanium
10/20/2009US7605032 Method for producing a trench transistor and trench transistor
10/20/2009US7605031 Semiconductor device having strain-inducing substrate and fabrication methods thereof
10/20/2009US7605030 Hafnium tantalum oxynitride high-k dielectric and metal gates
10/20/2009US7605029 Method of manufacturing semiconductor device
10/20/2009US7605028 Method of forming a memory device having a storage transistor
10/20/2009US7605027 Method of fabricating a bipolar transistor
10/20/2009US7605025 Methods of forming MOSFETS using crystalline sacrificial structures
10/20/2009US7605024 Electro-optic device, method for manufacturing the same, and electronic apparatus
10/20/2009US7605023 Manufacturing method for a semiconductor device and heat treatment method therefor
10/20/2009US7605021 Manufacturing method of electronic device
10/20/2009US7605020 Semiconductor chip package
10/20/2009US7605019 Semiconductor device with stacked chips and method for manufacturing thereof
10/20/2009US7605018 Method for forming a die-attach layer during semiconductor packaging processes
10/20/2009US7605017 Method of manufacturing a semiconductor device and products made thereby
10/20/2009US7605016 CMOS image sensor and method of manufacturing the same
10/20/2009US7605015 Process for the singulation of integrated devices in thin semiconductor chips
10/20/2009US7605014 Method of fabricating resistive probe having self-aligned metal shield
10/20/2009US7605013 Photo-detector and related methods
10/20/2009US7605012 ZnO based compound semiconductor light emitting device and method for manufacturing the same
10/20/2009US7605011 Semiconductor device and a method of manufacturing a semiconductor device
10/20/2009US7605010 Integrated silicon optical isolator
10/20/2009US7605009 Method of fabrication MEMS integrated circuits
10/20/2009US7605008 Plasma ignition and complete faraday shielding of capacitive coupling for an inductively-coupled plasma
10/20/2009US7605007 Semiconductor device and method of manufacturing the same
10/20/2009US7605006 Method of manufacturing a magnetic head
10/20/2009US7604928 Patterning method and methods for producing electro-optic device, color filter, illuminant, and thin-film transistor
10/20/2009US7604927 Methods of patterning using photomasks including shadowing elements therein and related systems
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