Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
02/2010
02/16/2010US7662909 Polysulfone compositions exhibiting very low color and high light transmittance properties and articles made therefrom
02/16/2010US7662762 Aqueous solution containing fluorine compound, amine and chelate compound
02/16/2010US7662733 Vapor phase growth apparatus
02/16/2010US7662731 Quantum dot manipulating method and quantum dot production/manipulation apparatus
02/16/2010US7662730 Method for fabricating ultra-high tensile-stressed film and strained-silicon transistors thereof
02/16/2010US7662729 Atomic layer deposition of a ruthenium layer to a lanthanide oxide dielectric layer
02/16/2010US7662728 Substrate processing method
02/16/2010US7662727 Method for manufacturing semiconductor device background
02/16/2010US7662726 Integrated circuit device having a gas-phase deposited insulation layer
02/16/2010US7662725 Composition for etching double metal layer, method of fabricating array substrate using the composition, and method of forming double metal line using the composition
02/16/2010US7662724 Method of manufacturing a ferroelectric capacitor with a hydrogen barrier layer
02/16/2010US7662723 Methods and apparatus for in-situ substrate processing
02/16/2010US7662722 Air gap under on-chip passive device
02/16/2010US7662721 Hard mask layer stack and a method of patterning
02/16/2010US7662720 3-Dimensional flash memory device and method of fabricating the same
02/16/2010US7662719 Slurry for use in polishing semiconductor device conductive structures that include copper and tungsten and polishing methods
02/16/2010US7662718 Trim process for critical dimension control for integrated circuits
02/16/2010US7662717 Method of forming metal layer used in the fabrication of semiconductor device
02/16/2010US7662716 Method for forming silicide contacts
02/16/2010US7662715 Thin film transistor array panel and method for manufacturing the same
02/16/2010US7662714 Method for forming metal line of semiconductor device
02/16/2010US7662713 Semiconductor device production method that includes forming a gold interconnection layer
02/16/2010US7662712 UV blocking and crack protecting passivation layer fabricating method
02/16/2010US7662711 Method of forming dual damascene pattern
02/16/2010US7662710 Formation of through-wafer electrical interconnections and other structures using a thin dielectric membrane
02/16/2010US7662709 Surface mounting method
02/16/2010US7662708 Self-assembled interconnection particles
02/16/2010US7662707 Method of forming relatively continuous silicide layers for semiconductor devices
02/16/2010US7662705 Partial implantation method for semiconductor manufacturing
02/16/2010US7662704 Electro-optical device, method of manufacturing the same, electronic apparatus, and semiconductor device
02/16/2010US7662703 Method for manufacturing crystalline semiconductor film and semiconductor device
02/16/2010US7662702 Method for manufacturing a crystalline silicon layer
02/16/2010US7662701 Gettering of silicon on insulator using relaxed silicon germanium epitaxial proximity layers
02/16/2010US7662700 Optical device wafer dividing method
02/16/2010US7662699 Method for fabricating semiconductor device
02/16/2010US7662698 Transistor having field plate
02/16/2010US7662697 Method of forming isolation structure of semiconductor device
02/16/2010US7662696 Method for fabricating semiconductor devices
02/16/2010US7662695 Capacitor structure and fabricating method thereof
02/16/2010US7662694 Capacitor having adjustable capacitance, and printed wiring board having the same
02/16/2010US7662693 Lanthanide dielectric with controlled interfaces
02/16/2010US7662692 Integrated process for thin film resistors with silicides
02/16/2010US7662691 Method for fabricating semiconductor device with epitaxial growth
02/16/2010US7662690 Method of preparing a semiconductor substrate utilizing plural implants under an isolation region to isolate adjacent wells
02/16/2010US7662689 Strained transistor integration for CMOS
02/16/2010US7662688 Application of different isolation schemes for logic and embedded memory
02/16/2010US7662687 Semiconductor memory having charge trapping memory cells and fabrication method thereof
02/16/2010US7662686 Semiconductor device and a method of manufacturing the same
02/16/2010US7662685 Semiconductor device and manufacturing method thereof
02/16/2010US7662684 Method for reducing poly-depletion in dual gate CMOS fabrication process
02/16/2010US7662683 Method for forming gate dielectric layer
02/16/2010US7662682 Highly uniform group III nitride epitaxial layers on 100 millimeter diameter silicon carbide substrates
02/16/2010US7662681 Method for fabricating reverse-staggered thin film transistor
02/16/2010US7662680 Method of producing a semiconductor element in a substrate and a semiconductor element
02/16/2010US7662679 Semiconductor manufacturing method and semiconductor device
02/16/2010US7662678 Method of forming a more highly-oriented silicon layer and substrate having the same
02/16/2010US7662677 Method of fabricating semiconductor device
02/16/2010US7662676 Signal line for display device and thin film transistor array panel including the signal line
02/16/2010US7662675 Method of forming metal thin film and metal wiring pattern and method of manufacturing display panel
02/16/2010US7662674 Methods of forming electromigration and thermal gradient based fuse structures
02/16/2010US7662673 Semiconductor device and method of manufacturing the same, electronic device and method of manufacturing the same, and electronic instrument
02/16/2010US7662672 Manufacturing process of leadframe-based BGA packages
02/16/2010US7662671 Semiconductor device and method for manufacturing the same
02/16/2010US7662670 Manufacturing method of semiconductor device
02/16/2010US7662669 Method of exposing circuit lateral interconnect contacts by wafer saw
02/16/2010US7662668 Method for separating a semiconductor substrate into a plurality of chips along with a cutting line on the semiconductor substrate
02/16/2010US7662667 Die rearrangement package structure using layout process to form a compliant configuration
02/16/2010US7662666 Method of processing wafer
02/16/2010US7662665 Method for fabricating a semiconductor package including stress relieving layer for flip chip packaging
02/16/2010US7662664 Electronic circuit in a package-on-package configuration and method for producing the same
02/16/2010US7662663 OLED patterning method
02/16/2010US7662662 Method for manufacturing carrier substrate
02/16/2010US7662661 Method of manufacturing a substrate structure for increasing cutting precision and strength thereof
02/16/2010US7662660 Thin film transistor array substrate and fabrication method thereof
02/16/2010US7662658 Photodiode with ultra-shallow junction for high quantum efficiency CMOS image sensor and method of formation
02/16/2010US7662657 Transparent metal shielded isolation for image sensors
02/16/2010US7662656 Light block for pixel arrays
02/16/2010US7662655 Vacuum packaged single crystal silicon device
02/16/2010US7662654 Vacuum packaged single crystal silicon device
02/16/2010US7662653 Method of manufacturing a hermetic chamber with electrical feedthroughs
02/16/2010US7662652 Chemical sensor using semiconducting metal oxide nanowires
02/16/2010US7662651 Thin film transistor array panel and method of manufacturing the same
02/16/2010US7662650 Providing photonic control over wafer borne semiconductor devices
02/16/2010US7662649 Methods for assessing alignments of substrates within deposition apparatuses; and methods for assessing thicknesses of deposited layers within deposition apparatuses
02/16/2010US7662648 Integrated circuit inspection system
02/16/2010US7662647 Method for manufacturing semiconductor device
02/16/2010US7662646 Plasma processing method and plasma processing apparatus for performing accurate end point detection
02/16/2010US7662645 Reworked integrated circuit device and reworking method thereof
02/16/2010US7662546 Apparatus for processing substrate and method of processing the same
02/16/2010US7662539 Resist pattern thickening material, process for forming resist pattern, and process for manufacturing semiconductor device
02/16/2010US7662524 Scanning beam of metallic ions over defect to dope, reducing transparency; implanting gallium atoms to reduce transmission and quartz can be etched
02/16/2010US7662523 Photo mask, exposure method using the same, and method of generating data
02/16/2010US7662522 Method for manufacturing semiconductor devices, and method for forming a pattern onto an exposure mask
02/16/2010US7662302 Lifting and supporting device
02/16/2010US7662265 Making bipolar electrochemical devices, such as batteries, using electrophoresis; bipolar device is assembled by applying a field that creates a physical separation between two active electrode materials without requiring insertion of a discrete separator film or electrolyte layer
02/16/2010US7662254 Methods of and apparatus for aligning electrodes in a process chamber to protect an exclusion area within an edge environ of a wafer
02/16/2010US7662253 Apparatus for the removal of a metal oxide from a substrate and methods therefor
02/16/2010US7662239 Low surface roughness and high yield obtained by pasting gallium nitride as-grown wafers on a polishing plate with notches facing forward, backward, or inward, with thermoplastic wax having a thickness of < 10 mu m , grinding,lapping, polishing into mirror wafers and beveling
02/16/2010US7662236 Method for forming insulation film
02/16/2010US7662025 Polishing apparatus including separate retainer rings