Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/2011
03/01/2011US7897989 Light emitter
03/01/2011US7897975 Light emitting display device and method for fabricating the same
03/01/2011US7897973 Display device and manufacturing method thereof
03/01/2011US7897972 Electronic circuit
03/01/2011US7897971 Display device
03/01/2011US7897970 Lower substrate, display apparatus having the same and method of manufacturing the same
03/01/2011US7897968 Electronic device and semiconductor device and method for manufacturing the same
03/01/2011US7897967 Anti-fuse device
03/01/2011US7897957 Non-volatile resistance switching memory
03/01/2011US7897954 Dielectric-sandwiched pillar memory device
03/01/2011US7897953 Multi-level programmable PCRAM memory
03/01/2011US7897943 Controlling the characteristics of implanter ion-beams
03/01/2011US7897896 Temperature setting method of thermal processing plate, computer-readable recording medium recording program thereon, and temperature setting apparatus for thermal processing plate
03/01/2011US7897892 Method of bonding an optical component
03/01/2011US7897525 Methods and systems of transferring, docking and processing substrates
03/01/2011US7897524 Manufacturing method for semiconductor device and manufacturing apparatus for semiconductor device
03/01/2011US7897523 Substrate heating apparatus, heating method, and semiconductor device manufacturing method
03/01/2011US7897522 Method and system for improving particle beam lithography
03/01/2011US7897521 Low dielectric constant plasma polymerized thin film and manufacturing method thereof
03/01/2011US7897519 crosslinkable polysilxone having a vinyl group, an acetylene group or an acryl group as a functional group for participating in a crosslinking reaction, a crosslinking agent such as dipentaerythritol pentaacrylate or hexaacrylate and a solvent; almost hysteresis-free, chemical resistance
03/01/2011US7897518 Plasma processing method and computer storage medium
03/01/2011US7897517 Method of selectively depositing materials on a substrate using a supercritical fluid
03/01/2011US7897516 Use of ultra-high magnetic fields in resputter and plasma etching
03/01/2011US7897515 Method of fabricating structures
03/01/2011US7897514 Semiconductor contact barrier
03/01/2011US7897513 Method for forming a metal silicide
03/01/2011US7897511 Wafer-level stack package and method of fabricating the same
03/01/2011US7897510 Semiconductor device package, semiconductor apparatus, and methods for manufacturing the same
03/01/2011US7897509 Semiconductor wafer and method of manufacturing the same and method of manufacturing semiconductor device
03/01/2011US7897508 Method to eliminate Cu dislocation for reliability and yield
03/01/2011US7897507 Barrier layer configurations and methods for processing microelectronic topographies having barrier layers
03/01/2011US7897506 Micro-electro-mechanical-system device with particles blocking function and method for making same
03/01/2011US7897505 Method for enhancing adhesion between layers in BEOL fabrication
03/01/2011US7897504 Method for fabricating semiconductor device
03/01/2011US7897503 Infinitely stackable interconnect device and method
03/01/2011US7897502 Method of forming vertically offset bond on trace interconnects on recessed and raised bond fingers
03/01/2011US7897501 Method of fabricating a field-effect transistor having robust sidewall spacers
03/01/2011US7897500 Methods for forming silicide conductors using substrate masking
03/01/2011US7897499 Method for fabricating a semiconductor device with self-aligned contact
03/01/2011US7897498 Method for manufacturing semiconductor device
03/01/2011US7897497 Overvoltage-protected light-emitting semiconductor device, and method of fabrication
03/01/2011US7897496 Semiconductor doping with reduced gate edge diode leakage
03/01/2011US7897495 Formation of epitaxial layer containing silicon and carbon
03/01/2011US7897494 Formation of single crystal semiconductor nanowires
03/01/2011US7897493 Inducement of strain in a semiconductor layer
03/01/2011US7897492 Apparatus and method for transformation of substrate
03/01/2011US7897491 Separate injection of reactive species in selective formation of films
03/01/2011US7897490 Single crystal group III nitride articles and method of producing same by HVPE method incorporating a polycrystalline layer for yield enhancement
03/01/2011US7897489 Selective activation of hydrogen passivated silicon and germanium surfaces
03/01/2011US7897488 Dividing method for wafer having film on the front side thereof
03/01/2011US7897487 Laser processing method and chip
03/01/2011US7897486 Semiconductor wafer coat layers and methods therefor
03/01/2011US7897485 Wafer processing including forming trench rows and columns at least one of which has a different width
03/01/2011US7897484 Fabricating a top conductive layer in a semiconductor die
03/01/2011US7897483 Semiconductor device and method of manufacturing semiconductor device
03/01/2011US7897482 Semiconductor device and manufacturing method thereof
03/01/2011US7897481 High throughput die-to-wafer bonding using pre-alignment
03/01/2011US7897480 Preparation of high quality strained-semiconductor directly-on-insulator substrates
03/01/2011US7897479 Managing integrated circuit stress using dummy diffusion regions
03/01/2011US7897478 Semiconductor device with field plate and method
03/01/2011US7897477 Method of forming an isolation structure
03/01/2011US7897476 Method of manufacturing SOI substrate
03/01/2011US7897475 Semiconductor device having projection on lower electrode and method for forming the same
03/01/2011US7897474 Method of forming semiconductor device including capacitor and semiconductor device including capacitor
03/01/2011US7897473 Method of manufacturing a dual contact trench capacitor
03/01/2011US7897472 Apparatus and method for wafer level fabrication of high value inductors on semiconductor integrated circuits
03/01/2011US7897471 Method and apparatus to improve the reliability of the breakdown voltage in high voltage devices
03/01/2011US7897470 Non-volatile memory cell device and methods
03/01/2011US7897469 Impact ionization MOSFET method
03/01/2011US7897468 Device having self-aligned double gate formed by backside engineering, and device having super-steep retrograded island
03/01/2011US7897467 Semiconductor integrated circuit device and manufacturing method thereof
03/01/2011US7897466 Method for manufacturing semiconductor device
03/01/2011US7897465 Semiconductor device having reduced sub-threshold leakage
03/01/2011US7897464 Method of manufacturing semiconductor device
03/01/2011US7897463 Methods of fabricating vertical twin-channel transistors
03/01/2011US7897462 Method of manufacturing semiconductor component with gate and shield electrodes in trenches
03/01/2011US7897461 Semiconductor device and method for fabricating the same
03/01/2011US7897460 Methods of forming recessed access devices associated with semiconductor constructions
03/01/2011US7897459 Semiconductor device and manufacturing method thereof
03/01/2011US7897458 Method of forming floating gate, non-volatile memory device using the same, and fabricating method thereof
03/01/2011US7897457 Method for manufacturing a nonvolatile semiconductor memory device
03/01/2011US7897456 Non-volatile memory device and method for fabricating the same
03/01/2011US7897454 Metal-insulator-metal capacitor and fabrication method thereof
03/01/2011US7897453 Dual insulating layer diode with asymmetric interface state and method of fabrication
03/01/2011US7897452 Method of producing a semiconductor device with an aluminum or aluminum alloy rear electrode
03/01/2011US7897451 Method for creating tensile strain by selectively applying stress memorization techniques to NMOS transistors
03/01/2011US7897450 Method for encapsulating a high-K gate stack by forming a liner at two different process temperatures
03/01/2011US7897449 Pixel structure and method for manufacturing the same
03/01/2011US7897448 Formation of high voltage transistor with high breakdown voltage
03/01/2011US7897447 Use of in-situ HCL etch to eliminate by oxidation recrystallization border defects generated during solid phase epitaxy (SPE) in the fabrication of nano-scale CMOS transistors using direct silicon bond substrate (DSB) and hybrid orientation technology (HOT)
03/01/2011US7897446 Method of forming a high electron mobility transistor hemt, utilizing self-aligned miniature field mitigating plate and protective dielectric layer
03/01/2011US7897445 Fabrication methods for self-aligned LDD thin-film transistor
03/01/2011US7897444 Strained semiconductor-on-insulator (sSOI) by a simox method
03/01/2011US7897443 Production method of semiconductor device and semiconductor device
03/01/2011US7897442 Method for fabricating pixel structure
03/01/2011US7897441 Method of fabricating a CMOS image sensor
03/01/2011US7897440 Vertical thyristor-based memory with trench isolation and method of fabrication thereof
03/01/2011US7897439 Electronic device with unique encoding
03/01/2011US7897438 Method of making semiconductor package with plated connection
03/01/2011US7897437 Thermal interconnect systems methods of production and uses thereof