Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/2011
03/08/2011US7902076 Method of fabricating semiconductor device
03/08/2011US7902075 Semiconductor trench structure having a sealing plug and method
03/08/2011US7902074 Simplified pitch doubling process flow
03/08/2011US7902073 Glue layer for hydrofluorocarbon etch
03/08/2011US7902072 Metal-polishing composition and chemical-mechanical polishing method
03/08/2011US7902071 Method for forming active and gate runner trenches
03/08/2011US7902070 Method and system for producing optically transparent noble metal films
03/08/2011US7902069 Small area, robust silicon via structure and process
03/08/2011US7902068 Manufacturing method of semiconductor device
03/08/2011US7902067 Post passivation interconnection schemes on top of the IC chips
03/08/2011US7902066 Damascene contact structure for integrated circuits
03/08/2011US7902065 Multi-layered metal line having an improved diffusion barrier of a semiconductor device and method for forming the same
03/08/2011US7902064 Method of forming a layer to enhance ALD nucleation on a substrate
03/08/2011US7902063 Methods for discretized formation of masking and capping layers on a substrate
03/08/2011US7902062 Electrodepositing a metal in integrated circuit applications
03/08/2011US7902061 Interconnect structures with encasing cap and methods of making thereof
03/08/2011US7902060 Attachment using magnetic particle based solder composites
03/08/2011US7902059 Methods of forming void-free layers in openings of semiconductor substrates
03/08/2011US7902058 Inducing strain in the channels of metal gate transistors
03/08/2011US7902057 Methods of fabricating dual fin structures
03/08/2011US7902056 Plasma treated metal silicide layer formation
03/08/2011US7902055 Method of manufacturing a dual metal Schottky diode
03/08/2011US7902054 Schottky barrier semiconductor device and method for manufacturing the same
03/08/2011US7902053 Method of processing semiconductor wafer
03/08/2011US7902052 System and process for processing a plurality of semiconductor thin films which are crystallized using sequential lateral solidification techniques
03/08/2011US7902051 Method for fabrication of single crystal diodes for resistive memories
03/08/2011US7902050 Methods and apparatus for incorporating nitrogen in oxide films
03/08/2011US7902049 Method for depositing high-quality microcrystalline semiconductor materials
03/08/2011US7902048 Providing a bivalent first precursor having germanium onto a surface and providing at least one of a second and third precursors onto the surface using a deposition process; second precursor may have antimony, and third precursor may have tellurium; for manufacturing a storage node
03/08/2011US7902047 Dual chamber system providing simultaneous etch and deposition on opposing substrate sides for growing low defect density epitaxial layers
03/08/2011US7902046 Thin buffer layers for SiGe growth on mismatched substrates
03/08/2011US7902045 Process for fabricating a structure for epitaxy without an exclusion zone
03/08/2011US7902043 Method of producing bonded wafer
03/08/2011US7902042 Method of manufacturing SOI wafer and thus-manufactured SOI wafer
03/08/2011US7902041 Method for manufacturing semiconductor device
03/08/2011US7902040 Dual-sided substrate measurement apparatus and methods
03/08/2011US7902039 Method for manufacturing silicon wafer
03/08/2011US7902038 Detachable substrate with controlled mechanical strength and method of producing same
03/08/2011US7902037 Isolation structure in memory device and method for fabricating the same
03/08/2011US7902036 Method of fabricating semiconductor device and the semiconductor device
03/08/2011US7902035 Semiconductor device having multiple fin heights
03/08/2011US7902034 Method of manufacturing SOI substrate and method of manufacturing semiconductor device
03/08/2011US7902033 Methods and devices for a high-k stacked capacitor
03/08/2011US7902032 Method for forming strained channel PMOS devices and integrated circuits therefrom
03/08/2011US7902031 Method for angular doping of source and drain regions for odd and even NAND blocks
03/08/2011US7902030 Manufacturing method for semiconductor device and semiconductor device
03/08/2011US7902029 Process for fabricating a self-aligned deposited source/drain insulated gate field-effect transistor
03/08/2011US7902028 Methods of forming field effect transistors, methods of forming field effect transistor gates, methods of forming integrated circuitry comprising a transistor gate array and circuitry peripheral to the gate array, and methods of forming integrated circuitry comprising a transistor gate array including first gates and second grounded isolation gates
03/08/2011US7902027 Method of manufacturing a semiconductor device including recessed-channel-array MOSFET having a higher operational speed
03/08/2011US7902026 Method of fabricating semiconductor device having vertical channel transistor
03/08/2011US7902025 Method of manufacturing semiconductor device
03/08/2011US7902024 Nonvolatile semiconductor device including a floating gate, method of manufacturing the same and associated systems
03/08/2011US7902023 Method of manufacturing non-volatile semiconductor storage device
03/08/2011US7902022 Self-aligned in-laid split gate memory and method of making
03/08/2011US7902021 Method for separately optimizing spacer width for two or more transistor classes using a recess spacer integration
03/08/2011US7902020 Semiconductor device and method of manufacturing the same
03/08/2011US7902019 Dielectric layer for semiconductor device and method of manufacturing the same
03/08/2011US7902018 Fluorine plasma treatment of high-k gate stack for defect passivation
03/08/2011US7902017 Process of forming an electronic device including a trench and a conductive structure therein
03/08/2011US7902015 Array of nanoscopic MOSFET transistors and fabrication methods
03/08/2011US7902014 CMOS devices with a single work function gate electrode and method of fabrication
03/08/2011US7902013 Method of forming a semiconductor die with reduced RF attenuation
03/08/2011US7902012 High speed lateral heterojunction MISFETs realized by 2-dimensional bandgap engineering and methods thereof
03/08/2011US7902011 Method of fabricating Schottky barrier transistor
03/08/2011US7902010 Mask for sequential lateral solidification (SLS) process and a method for crystallizing amorphous silicon by using the same
03/08/2011US7902009 Graded high germanium compound films for strained semiconductor devices
03/08/2011US7902008 Methods for fabricating a stressed MOS device
03/08/2011US7902007 Semiconductor substrates and manufacturing methods of the same
03/08/2011US7902006 Method of manufacturing a thin film transistor array substrate
03/08/2011US7902005 Method for fabricating a fin-shaped semiconductor structure and a fin-shaped semiconductor structure
03/08/2011US7902004 ESD induced artifact reduction design for a thin film transistor image sensor array
03/08/2011US7902003 Semiconductor device and method for manufacturing the same
03/08/2011US7902002 Semiconductor device
03/08/2011US7902001 Method of fabricating thin film device
03/08/2011US7901999 FPGA equivalent input and output grid muxing on structural ASIC memory
03/08/2011US7901998 Packaging substrate having pattern-matched metal layers
03/08/2011US7901997 Method of manufacturing semiconductor device
03/08/2011US7901996 Integrated circuit package system with interconnection support and method of manufacture thereof
03/08/2011US7901995 Interconnections resistant to wicking
03/08/2011US7901994 Methods of manufacturing group III nitride semiconductor devices with silicon nitride layers
03/08/2011US7901993 Method of making a semiconductor chip assembly with an aluminum post/base heat spreader and a silver/copper conductive trace
03/08/2011US7901992 Die bonding agent and a semiconductor device made by using the same
03/08/2011US7901991 Method for manufacturing photovoltaic panels by the use of a polymeric tri-layer comprising a composite getter system
03/08/2011US7901990 Method of forming a molded array package device having an exposed tab and structure
03/08/2011US7901989 Reconstituted wafer level stacking
03/08/2011US7901988 Method for forming a package-on-package structure
03/08/2011US7901987 Package-on-package system with internal stacking module interposer
03/08/2011US7901986 Wiring substrate, manufacturing method thereof, and semiconductor device
03/08/2011US7901985 Method for manufacturing package on package with cavity
03/08/2011US7901984 Integrated circuit micro-module
03/08/2011US7901983 Bump-on-lead flip chip interconnection
03/08/2011US7901982 Modified chip attach process
03/08/2011US7901981 Integrated circuit micro-module
03/08/2011US7901980 Self-aligned in-contact phase change memory device
03/08/2011US7901979 Method of forming a small contact in phase-change memory
03/08/2011US7901976 Method of forming borderless contacts
03/08/2011US7901975 Continuous deposition process and apparatus for manufacturing cadmium telluride photovoltaic devices
03/08/2011US7901974 Masked laser anneal during fabrication of backside illuminated image sensors
03/08/2011US7901973 Solid state imaging device and manufacturing method thereof
03/08/2011US7901972 Camera module and method of manufacturing the same