Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2011
05/05/2011US20110101481 Photodetector Array Having Array of Discrete Electron Repulsive Elements
05/05/2011US20110101480 Compact camera module and method for fabricating the same
05/05/2011US20110101476 Electronic device, memory device, and method of fabricating the same
05/05/2011US20110101475 Cmos integrated micromechanical resonators and methods for fabricating the same
05/05/2011US20110101474 Method for protecting encapsulated sensor structures using stack packaging
05/05/2011US20110101472 Structure and method to form a thermally stable silicide in narrow dimension gate stacks
05/05/2011US20110101471 Method of forming a nanocluster-comprising dielectric layer and device comprising such a layer
05/05/2011US20110101470 High-k metal gate electrode structures formed by separate removal of placeholder materials in transistors of different conductivity type
05/05/2011US20110101469 Strain enhancement in transistors comprising an embedded strain-inducing semiconductor alloy by corner rounding at the top of the gate electrode
05/05/2011US20110101463 Semiconductor Device and Method for Manufacturing a Semiconductor Device
05/05/2011US20110101461 Semiconductor device and manufacturing method thereof
05/05/2011US20110101460 Semiconductor fuses in a semiconductor device comprising metal gates
05/05/2011US20110101459 Thin Film Transistors and Fabrication Methods Thereof
05/05/2011US20110101457 Semiconductor device and method of manufacturing the same
05/05/2011US20110101456 Strain engineering in three-dimensional transistors based on globally strained semiconductor base layers
05/05/2011US20110101455 Finfet spacer formation by oriented implantation
05/05/2011US20110101454 Semiconductor device and method for producing the same
05/05/2011US20110101452 Trench gate semiconductor device and method of manufacturing thereof
05/05/2011US20110101450 Semiconductor device with buried gates and buried bit lines and method for fabricating the same
05/05/2011US20110101449 Asymmetric field effect transistor structure and method
05/05/2011US20110101448 Vertical transistor and manufacturing method thereof
05/05/2011US20110101447 Semiconductor device with buried bit lines and method for fabricating the same
05/05/2011US20110101446 Staggered column superjunction
05/05/2011US20110101445 Substrate structures including buried wiring, semiconductor devices including substrate structures, and method of fabricating the same
05/05/2011US20110101444 Electrostatic protection device
05/05/2011US20110101442 Multi-Layer Charge Trap Silicon Nitride/Oxynitride Layer Engineering with Interface Region Control
05/05/2011US20110101441 Select gates for memory
05/05/2011US20110101440 Two pfet soi memory cells
05/05/2011US20110101439 Interconnection structures for semicondcutor devices
05/05/2011US20110101435 Buried bit line process and scheme
05/05/2011US20110101434 Semiconductor storage device and method of manufacturing the same
05/05/2011US20110101431 Semiconductor device and method of manufacturing same
05/05/2011US20110101427 Transistor including a high-k metal gate electrode structure formed prior to drain/source regions on the basis of a superior implantation masking effect
05/05/2011US20110101426 Semiconductor device comprising replacement gate electrode structures with an enhanced diffusion barrier
05/05/2011US20110101425 Semiconductor device with increased snapback voltage
05/05/2011US20110101424 Junction field effect transistor
05/05/2011US20110101423 Junction field effect transistor
05/05/2011US20110101422 Semiconductor device
05/05/2011US20110101421 Method of forming epi film in substrate trench
05/05/2011US20110101420 Increasing full well capacity of a photodiode used in digital photography
05/05/2011US20110101419 Semiconductor device, method of manufacturing semiconductor device and optical apparatus
05/05/2011US20110101418 Method for improving transistor performance through reducing the salicide interface resistance
05/05/2011US20110101416 Bipolar semiconductor device and manufacturing method
05/05/2011US20110101413 Semiconductor device and method of manufacturing the same
05/05/2011US20110101406 Light emitting device package and method for manufacturing the same
05/05/2011US20110101393 Light-emitting diode package structure and manufacturing method thereof
05/05/2011US20110101392 Package substrate for optical element and method of manufacturing the same
05/05/2011US20110101391 Group iii nitride semiconductor device and method for manufacturing the same, group iii nitride semiconductor light-emitting device and method for manufacturing the same, and lamp
05/05/2011US20110101384 Light-emitting device, method of manufacturing light-emitting device, and illumination device
05/05/2011US20110101375 Power Semiconductor Devices Having Selectively Doped JFET Regions and Related Methods of Forming Such Devices
05/05/2011US20110101374 Monolithic high voltage switching devices and related methods of fabricating the same
05/05/2011US20110101370 Semiconductor device and method of manufacturing thereof
05/05/2011US20110101369 Gallium nitride semiconductor device with improved termination scheme
05/05/2011US20110101368 Flash lamp annealing crystallization for large area thin films
05/05/2011US20110101364 Systems, methods and materials including crystallization of substrates via sub-melt laser anneal, as well as products produced by such processes
05/05/2011US20110101362 Electro-optical device and thin film transistor and method for forming the same
05/05/2011US20110101360 Semiconductor device and a method for manufacturing the same
05/05/2011US20110101354 Semiconductor element and method for manufacturing the same
05/05/2011US20110101352 Amorphous oxide and thin film transistor
05/05/2011US20110101349 Semiconductor package, method of evaluating same, and method of manufacturing same
05/05/2011US20110101347 Interconnect Sensor for Detecting Delamination
05/05/2011US20110101344 Semiconductor material
05/05/2011US20110101342 ZnO based semiconductor devices and methods of manufacturing the same
05/05/2011US20110101341 Sub-assembly for use in fabricating photo-electrochemical devices and a method of producing a sub-assembly
05/05/2011US20110101335 Semiconductor device and method for manufacturing the same
05/05/2011US20110101315 Piezoelectric nanowire structure and electronic device including the same
05/05/2011US20110101309 Graphene based switching device having a tunable bandgap
05/05/2011US20110101308 Utilization of Organic Buffer Layer to Fabricate High Performance Carbon Nanoelectronic Devices
05/05/2011US20110101307 Substrate for semiconductor device and method for manufacturing the same
05/05/2011US20110101302 Wafer-scale fabrication of separated carbon nanotube thin-film transistors
05/05/2011US20110101299 Carbon nanotube arrays for field electron emission and methods of manufacture and use
05/05/2011US20110101298 Methods, structures and devices for increasing memory density
05/05/2011US20110101249 Substrate holder and clipping device
05/05/2011US20110101201 Photodetector Array Having Electron Lens
05/05/2011US20110101105 Card-shaped data carrier
05/05/2011US20110100937 Adjustable Width Cassette for Wafer Film Frames
05/05/2011US20110100870 Supporting body and substrate storage container
05/05/2011US20110100810 Chip integrated ion sensor
05/05/2011US20110100554 Parallel system for epitaxial chemical vapor deposition
05/05/2011US20110100553 multi-peripheral ring arrangement for performing plasma confinement
05/05/2011US20110100411 Semiconductor nanowire thermoelectric materials and devices, and processes for producing same
05/05/2011US20110100408 Quantum well module with low K crystalline covered substrates
05/05/2011US20110100393 Method of cleaning mask and mask cleaning apparatus
05/05/2011US20110100295 System and method for forming an integrated barrier layer
05/05/2011US20110100087 Sensor for gases emitted by combustion
05/05/2011DE112009001706T5 Metallische Nanotinte und Verfahren zur Herstellung der metallischen Nanotinte, sowie Verfahren zum Chipbonden und Vorrichtung zum Chipbonden unter Verwendung der metallischen Nanotinte Metallic nano ink and process for preparing the metal nano ink, and to methods of chip bonding and die bonding apparatus for using the metal nano ink
05/05/2011DE112009000518T5 Verfahren zum Aushärten eines porösen dielektrischen Films mit niedriger Dielektrizitätskonstante A method for curing a porous dielectric film having a low dielectric constant
05/05/2011DE112006000413B4 Nicht-flüchtige Speichervorrichtung mit abgeschrägtem Steuergateprofil und deren Herstellungsverfahren, dazugehörige Flashspeicher und Verfahren zum Speichern von Informationen in einer derartigen Speichervorrichtung Non-volatile memory device with bevelled control gate profile and their method of preparation, and procedures associated flash memory to store information in such a memory device
05/05/2011DE112004002678B4 Elektrisch programmierbares 2-Transistoren-Sicherungselement mit einfacher Polysiliziumschicht und elektrisch programmierbare Transistor-Sicherungszelle Electrically programmable 2-transistor fuse element with simple polysilicon layer and electrically programmable fuse transistor cell
05/05/2011DE10339924B4 ESD-Testanordnung und Verfahren ESD test arrangement and method
05/05/2011DE10297102B4 Vorrichtung und Verfahren zum Herstellen einer dünnen Platte Apparatus and method for manufacturing a thin plate
05/05/2011DE102010060194A1 Kopplungsstruktur mit hoher Spannungsfestigkeit Coupling structure with high electric strength
05/05/2011DE102010045073A1 Electrical fuse structure for use in semiconductor device in semiconductor industry, has cathode connectors coupled with cathode, where parameters of are connectors equal to or greater than two times of characteristic parameter of contact
05/05/2011DE102010042929A1 Halbleitervorrichtung und deren Herstellungsverfahren A semiconductor device and its manufacturing method
05/05/2011DE102010037247A1 Halbleiterstruktur und Verfahren für deren Herstellung Semiconductor structure and methods for their preparation
05/05/2011DE102010036818A1 Bipolarhalbleiterbauelement und Herstellungsverfahren Bipolarhalbleiterbauelement and manufacturing processes
05/05/2011DE102010033550A1 Verfahren zur Bildung von lötbaren Seitenflächen-Anschlüssen von QFN-(QUAD NO- LEAD FRAME)-Gehäusen für intregrierte Schaltungen A method of forming side surfaces of solderable terminals of QFN (Quad NO LEAD FRAME) housings for circuits intregrierte
05/05/2011DE102009058962A1 Verfahren und Vorrichtung zum Behandeln von Substraten Method and apparatus for treating substrates
05/05/2011DE102009057592B3 Wire guiding roller, useful in wire saw for separating many pieces from work-piece to produce square or pseudo-square and mono- or poly-crystalline solar wafers, comprises material to be coated on roller and many grooves for guiding wire
05/05/2011DE102009051943A1 Interconnection unit for rear side contacting of solar cells for converting solar energy into electrical energy, has metal film, where circumference of each opening in carrier film is larger than circumference of each opening in metal film