Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2011
05/26/2011US20110124193 Customized patterning modulation and optimization
05/26/2011US20110124192 Process for forming cobalt-containing materials
05/26/2011US20110124191 Compositions for the currentless deposition of ternary materials for use in the semiconductor industry
05/26/2011US20110124190 Method for manufacturing a semiconductor device
05/26/2011US20110124189 Increasing Electromigration Resistance in an Interconnect Structure of a Semiconductor Device by Forming an Alloy
05/26/2011US20110124188 Methods of fabricating electrodes and uses thereof
05/26/2011US20110124187 Vapor phase deposition processes for doping silicon
05/26/2011US20110124186 Apparatus and method for controllably implanting workpieces
05/26/2011US20110124185 Graded core/shell semiconductor nanorods and nanorod barcodes
05/26/2011US20110124184 Method of forming polysilicon, thin film transistor using the polysilicon, and method of fabricating the thin film transistor
05/26/2011US20110124183 Method for manufacturing flexible semiconductor substrate
05/26/2011US20110124182 System for the delivery of germanium-based precursor
05/26/2011US20110124181 Workpiece cutting method
05/26/2011US20110124180 Semiconductor device manufacturing method comprising a metal pattern and laser modified regions in a cutting region
05/26/2011US20110124179 Soi substrate and manufacturing method thereof
05/26/2011US20110124178 Structure and method of fabricating a transistor having a trench gate
05/26/2011US20110124177 Simultaneously formed isolation trench and through-box contact for silicon-on-insulator technology
05/26/2011US20110124176 Methods of forming a capacitor structure and methods of manufacturing a semiconductor device using the same
05/26/2011US20110124175 Alteration method and alteration apparatus for titanium nitride
05/26/2011US20110124174 Method of forming variable resistance memory device
05/26/2011US20110124173 Method of Manufacturing Semiconductor Device
05/26/2011US20110124172 Method of forming insulating layer and method of manufacturing transistor using the same
05/26/2011US20110124171 Applying epitaxial silicon in disposable spacer flow
05/26/2011US20110124170 Process for fabricating a self-aligned deposited source/drain insulated gate field-effect transistor
05/26/2011US20110124169 Methods of selectively depositing an epitaxial layer
05/26/2011US20110124168 Methods of Forming Field Effect Transistors, Methods of Forming Field Effect Transistor Gates, Methods of Forming Integrated Circuitry Comprising a Transistor Gate Array and Circuitry Peripheral to the Gate Array, and Methods of Forming Integrated Circuitry Comprising a Transistor Gate Array Including First Gates and Second Grounded Isolation Gates
05/26/2011US20110124167 Configuration and method to form MOSFET devices with low resistance silicide gate and mesa contact regions
05/26/2011US20110124166 Memory device and method of manufacturing the same
05/26/2011US20110124165 Structure and Method for Manufacturing Device with a V-Shape Channel NMosfet
05/26/2011US20110124164 Method for manufacturing soi substrate and semiconductor device
05/26/2011US20110124163 Thin film transistor array panel and method for manufacturing the same
05/26/2011US20110124162 Method of fabricating array substrate
05/26/2011US20110124161 Structure and method for fabricating a microelectronic device provided with one or more quantum wires able to form one or more transistor channels
05/26/2011US20110124160 Semiconductor device and method of producing the same
05/26/2011US20110124159 Manufacturing method of semiconductor device
05/26/2011US20110124158 Thermal enhanced upper and dual heat sink exposed molded leadless package
05/26/2011US20110124157 Method for encapsulating electronic components on a wafer
05/26/2011US20110124156 Method of Fabricating Semiconductor Die with Through-Hole Via on Saw Streets and Through-Hole Via in Active Area of Die
05/26/2011US20110124155 Hybrid structure of multi-layer substrates and manufacture method thereof
05/26/2011US20110124154 Hybrid structure of multi-layer substrates and manufacture method thereof
05/26/2011US20110124153 Method for manufacturing semiconductor device
05/26/2011US20110124152 Method of manufacturing semiconductor for transistor and method of manufacturing the transistor
05/26/2011US20110124150 Chalcogenide Absorber Layers for Photovoltaic Applications and Methods of Manufacturing the Same
05/26/2011US20110124148 Methods of forming nano structure and methods of forming solar cell using the same
05/26/2011US20110124144 Substrate processing system and substrate processing method
05/26/2011US20110124143 Packaged device and method of manufacturing the same
05/26/2011US20110124139 Method for manufacturing free-standing substrate and free-standing light-emitting device
05/26/2011US20110124135 Solar Cell Module and Method for Assembling a Solar Cell Module
05/26/2011US20110124134 End-cut first approach for critical dimension control
05/26/2011US20110124133 Spin-current switchable magnetic memory element and method of fabricating the memory element
05/26/2011US20110123932 Method for forming a fluid ejection device
05/26/2011US20110123912 Manufacturing method of transparent substrate for mask blanks, manufacturing method of mask blanks, manufacturing method of exposure masks, manufacturing method of semiconductor devices, manufacturing method of liquid crystal display devices, and defect correction method of exposure masks
05/26/2011US20110123300 Method of assembling substrate transfer device and transfer system unit for the same
05/26/2011US20110123164 Implementation of one or more optical waveguides in reduced optical material
05/26/2011US20110123058 Composite microphone, microphone assembly and method of manufacturing those
05/26/2011US20110122994 X-ray imaging system and method
05/26/2011US20110122936 Integrated testing circuitry for high-frequency receiver integrated circuits
05/26/2011US20110122718 Low Cost Testing and Sorting for Integrated Circuits
05/26/2011US20110122688 Reading array cell with matched reference cell
05/26/2011US20110122682 High Density Low Power Nanowire Phase Change Material Memory Device
05/26/2011US20110122674 Reverse connection mtj cell for stt mram
05/26/2011US20110122592 First-level interconnects with slender columns, and processes of forming same
05/26/2011US20110122587 Flexible circuit stretching
05/26/2011US20110122498 Annular solid immersion lenses and methods of making them
05/26/2011US20110122415 Method for optically enhanced holograhic interferometric testing for test and evaluation of semiconductor devices and materials
05/26/2011US20110122393 Substrate transport apparatus and method, exposure apparatus and exposure method, and device fabricating method
05/26/2011US20110122380 Immersion photolithography system and method using inverted wafer-projection optics interface
05/26/2011US20110122377 Projection exposure apparatus, projection exposure method, and method for producing device
05/26/2011US20110122353 Active matrix substrate, display device, television apparatus, manufacturing method of an active matrix substrate, and manufacturing method of a display device
05/26/2011US20110122124 Transistor circuit, display panel and electronic apparatus
05/26/2011US20110121808 Voltage converter and systems including same
05/26/2011US20110121469 Passivation layer surface topography modifications for improved integrity in packaged assemblies
05/26/2011US20110121468 Semiconductor package and method of making same
05/26/2011US20110121465 Package stacking system with mold contamination prevention and method for manufacturing thereof
05/26/2011US20110121464 Semiconductor Device and Method of Forming Electrical Interconnect with Stress Relief Void
05/26/2011US20110121463 Semiconductor package, semiconductor device and methods of the same
05/26/2011US20110121461 Semiconductor device and method of packaging a semiconductor device with a clip
05/26/2011US20110121457 Process for Reversing Tone of Patterns on Integrated Circuit and Structural Process for Nanoscale Production
05/26/2011US20110121454 Stack semiconductor package and method for manufacturing the same
05/26/2011US20110121450 Semiconductor device and fabrication method therefor
05/26/2011US20110121449 Semiconductor Device and Method of Forming Compliant Stress Relief Buffer Around Large Array WLCSP
05/26/2011US20110121448 Semiconductor device and production method thereof
05/26/2011US20110121446 Fabrication of Atomic Scale Devices
05/26/2011US20110121445 Semiconductor device and method for manufacturing the same
05/26/2011US20110121444 Embedded chip packages
05/26/2011US20110121442 Package structure and package process
05/26/2011US20110121441 Diode leadframe for solar module assembly
05/26/2011US20110121439 Semiconductor device with protruding component portion and method of packaging
05/26/2011US20110121438 Extended under-bump metal layer for blocking alpha particles in a semiconductor device
05/26/2011US20110121437 Semiconductor device and manufacturing method
05/26/2011US20110121436 Method for forming dual high-k metal gate using photoresist mask and structures thereof
05/26/2011US20110121435 Photosensitive adhesive composition, filmy adhesive, adhesive sheet, adhesive pattern, semiconductor wafer with adhesive layer, semiconductor device, and process for producing semiconductor device
05/26/2011US20110121434 Method of fabricating a planar semiconductor nanowire
05/26/2011US20110121431 Substrate Comprising a Nanometer-scale Projection Array
05/26/2011US20110121430 Method for forming a silicon dioxide/metal oxide-nanolaminate with a desired wet etch rate
05/26/2011US20110121429 Low-voltage bidirectional protection diode
05/26/2011US20110121428 High gain tunable bipolar transistor
05/26/2011US20110121427 Through-substrate vias with polymer fill and method of fabricating same
05/26/2011US20110121426 Electronic device with fuse structure and method for repairing the same
05/26/2011US20110121425 Semiconductor device with improved esd protection