| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
|---|
| 01/31/2012 | US8105951 Method for fabricating device pattern |
| 01/31/2012 | US8105950 Method for forming fine patterns using etching slope of hard mask layer in semiconductor device |
| 01/31/2012 | US8105949 Substrate processing method |
| 01/31/2012 | US8105948 Use of CMP to contact a MTJ structure without forming a via |
| 01/31/2012 | US8105947 Post etch dielectric film re-capping layer |
| 01/31/2012 | US8105946 Method of forming conductive lines of semiconductor memory device |
| 01/31/2012 | US8105945 Method for manufacturing wiring, thin film transistor, light emitting device and liquid crystal display device, and droplet discharge apparatus for forming the same |
| 01/31/2012 | US8105944 Method of designing semiconductor device and method of manufacturing the same |
| 01/31/2012 | US8105943 Enhancing structural integrity and defining critical dimensions of metallization systems of semiconductor devices by using ALD techniques |
| 01/31/2012 | US8105942 CMP-first damascene process scheme |
| 01/31/2012 | US8105941 Through-wafer interconnection |
| 01/31/2012 | US8105940 Power distribution in a vertically integrated circuit |
| 01/31/2012 | US8105939 LDMOS transistor and method for manufacturing the same |
| 01/31/2012 | US8105938 Semiconductor substrate and method of manufacturing the same |
| 01/31/2012 | US8105937 Conformal adhesion promoter liner for metal interconnects |
| 01/31/2012 | US8105936 Methods for forming dielectric interconnect structures |
| 01/31/2012 | US8105935 Method of manufacturing a semiconductor device |
| 01/31/2012 | US8105934 Bump structure for a semiconductor device and method of manufacture |
| 01/31/2012 | US8105933 Localized alloying for improved bond reliability |
| 01/31/2012 | US8105932 Mixed wire semiconductor lead frame package |
| 01/31/2012 | US8105931 Method of fabricating dual high-k metal gates for MOS devices |
| 01/31/2012 | US8105930 Method of forming dielectric including dysprosium and scandium by atomic layer deposition and integrated circuit device including the dielectric layer |
| 01/31/2012 | US8105929 Gate control and endcap improvement |
| 01/31/2012 | US8105928 Graphene based switching device having a tunable bandgap |
| 01/31/2012 | US8105927 Method for manufacturing ion implantation mask, and method for manufacturing silicon carbide semiconductor device |
| 01/31/2012 | US8105926 Method for producing a semiconductor device by plasma doping a semiconductor region to form an impurity region |
| 01/31/2012 | US8105925 Method for forming an insulated gate field effect device |
| 01/31/2012 | US8105924 Deep trench based far subcollector reachthrough |
| 01/31/2012 | US8105923 Sintered semiconductor material |
| 01/31/2012 | US8105922 Method of thin film epitaxial growth using atomic layer deposition |
| 01/31/2012 | US8105921 Gallium nitride materials and methods |
| 01/31/2012 | US8105920 Semiconductor device with amorphous silicon mas memory cell structure and manufacturing method thereof |
| 01/31/2012 | US8105919 In-situ defect reduction techniques for nonpolar and semipolar (Al, Ga, In)N |
| 01/31/2012 | US8105918 Semiconductor device and method of fabricating the same including forming pillar neck patterns |
| 01/31/2012 | US8105917 Connection pad structure for an image sensor on a thinned substrate |
| 01/31/2012 | US8105916 Relaxation and transfer of strained layers |
| 01/31/2012 | US8105915 Semiconductor device and method of forming vertical interconnect structure between non-linear portions of conductive layers |
| 01/31/2012 | US8105914 Method of fabricating organic memory device |
| 01/31/2012 | US8105913 Method of fabricating a capacitor of a semiconductor device |
| 01/31/2012 | US8105912 High voltage tolerant metal-oxide-semiconductor device |
| 01/31/2012 | US8105911 Bipolar junction transistor guard ring structures and method of fabricating thereof |
| 01/31/2012 | US8105910 Method for forming silicide of semiconductor device |
| 01/31/2012 | US8105909 Method of fabricating non-volatile memory device |
| 01/31/2012 | US8105908 Methods for forming a transistor and modulating channel stress |
| 01/31/2012 | US8105907 Manufacturing method of semiconductor memory device |
| 01/31/2012 | US8105906 Method for fabricating asymmetric double-gate transistors by which asymmetric and symmetric double-gate transistors can be made on the same substrate |
| 01/31/2012 | US8105905 Configuration and method to form MOSFET devices with low resistance silicide gate and mesa contact regions |
| 01/31/2012 | US8105904 Method of manufacturing semiconductor devices |
| 01/31/2012 | US8105903 Method for making a trench MOSFET with shallow trench structures |
| 01/31/2012 | US8105902 Semiconductor device with vertical transistor and method for fabricating the same |
| 01/31/2012 | US8105901 Method for double pattern density |
| 01/31/2012 | US8105900 Manufacturing method of non-volatile memory |
| 01/31/2012 | US8105899 Method and structure for performing a chemical mechanical polishing process |
| 01/31/2012 | US8105898 Method and structure for performing a chemical mechanical polishing process |
| 01/31/2012 | US8105897 Method and structure for performing a chemical mechanical polishing process |
| 01/31/2012 | US8105896 Methods of forming capacitors |
| 01/31/2012 | US8105895 Enhancing Schottky breakdown voltage (BV) without affecting an integrated MOSFET-Schottky device layout |
| 01/31/2012 | US8105894 Semiconductor device manufacturing method and semiconductor device |
| 01/31/2012 | US8105893 Diffusion sidewall for a semiconductor structure |
| 01/31/2012 | US8105892 Thermal dual gate oxide device integration |
| 01/31/2012 | US8105891 Method for tuning a work function of high-K metal gate devices |
| 01/31/2012 | US8105890 Method of forming a semiconductor structure |
| 01/31/2012 | US8105889 Methods of fabricating transistors including self-aligned gate electrodes and source/drain regions |
| 01/31/2012 | US8105888 Diode assembly |
| 01/31/2012 | US8105887 Inducing stress in CMOS device |
| 01/31/2012 | US8105886 Semiconductor electrically programmable fuse element with amorphous silicon layer after programming and method of programming the same |
| 01/31/2012 | US8105885 Hardened programmable devices |
| 01/31/2012 | US8105884 Cross point memory arrays, methods of manufacturing the same, masters for imprint processes, and methods of manufacturing masters |
| 01/31/2012 | US8105883 Molding die with tilted runner, method of manufacturing semiconductor device using the same, and semiconductor device made by the method |
| 01/31/2012 | US8105882 Processing a memory request in a chip multiprocessor having a stacked arrangement |
| 01/31/2012 | US8105881 Method of fabricating chip package structure |
| 01/31/2012 | US8105880 Method for attaching a semiconductor die to a leadframe, and a semiconductor device |
| 01/31/2012 | US8105879 Near chip scale package integration process |
| 01/31/2012 | US8105878 Manufacturing method of a semiconductor device having a package dicing |
| 01/31/2012 | US8105877 Method of fabricating a stacked type chip package structure |
| 01/31/2012 | US8105876 Leadframe for leadless package, structure and manufacturing method using the same |
| 01/31/2012 | US8105875 Approach for bonding dies onto interposers |
| 01/31/2012 | US8105874 Memory circuit arrangement and method for the production thereof |
| 01/31/2012 | US8105873 Flexible semiconductor device and identification label |
| 01/31/2012 | US8105872 Semiconductor device and method of forming prefabricated EMI shielding frame with cavities containing penetrable material over semiconductor die |
| 01/31/2012 | US8105871 Semiconductor device and manufacturing method of the same |
| 01/31/2012 | US8105869 Method of manufacturing a silicon-based semiconductor device by essentially electrical means |
| 01/31/2012 | US8105868 Method for making solar sub-cells from a solar cell |
| 01/31/2012 | US8105867 Self-aligned three-dimensional non-volatile memory fabrication |
| 01/31/2012 | US8105866 Method of making PIN-type photo detecting element with a controlled thickness of window semiconductor layer |
| 01/31/2012 | US8105865 Liquid charge transporting material |
| 01/31/2012 | US8105864 Method of forming barrier regions for image sensors |
| 01/31/2012 | US8105863 Method for etching a see-through thin film solar module |
| 01/31/2012 | US8105862 Imager with tuned color filter |
| 01/31/2012 | US8105861 CMOS image sensor with reduced dark current |
| 01/31/2012 | US8105860 Support with integrated deposit of gas absorbing material for manufacturing microelectronic microoptoelectronic or micromechanical devices |
| 01/31/2012 | US8105859 In via formed phase change memory cell with recessed pillar heater |
| 01/31/2012 | US8105858 CMOS imager having a nitride dielectric |
| 01/31/2012 | US8105857 Method of fabricating group-III nitride semiconductor laser device |
| 01/31/2012 | US8105856 Method of manufacturing semiconductor device with wiring on side surface thereof |
| 01/31/2012 | US8105855 Method of manufacturing light emitting device |
| 01/31/2012 | US8105854 LED package |
| 01/31/2012 | US8105853 Surface-textured encapsulations for use with light emitting diodes |
| 01/31/2012 | US8105852 Method of forming a composite substrate and growing a III-V light emitting device over the composite substrate |
| 01/31/2012 | US8105851 Nitride film wet stripping |