Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2012
05/22/2012US8183684 Semiconductor device and method of manufacturing the same
05/22/2012US8183678 Semiconductor device having an interposer
05/22/2012US8183676 Memory circuit having memory chips parallel connected to ports and corresponding production method
05/22/2012US8183675 Integrated circuit package-on-package system with anti-mold flash feature
05/22/2012US8183671 Semiconductor device and method of manufacturing the same
05/22/2012US8183670 Semiconductor device and method of manufacturing the same
05/22/2012US8183669 Nitride semiconductor wafer having a chamfered edge
05/22/2012US8183662 Compact semiconductor package with integrated bypass capacitor
05/22/2012US8183660 Semiconductor component having rectifying junctions of different magnitudes and method for producing the same
05/22/2012US8183650 MEMS device and MEMS spring element
05/22/2012US8183647 Semiconductor device and manufacturing method for silicon oxynitride film
05/22/2012US8183645 Power semiconductor device including gate lead-out electrode
05/22/2012US8183644 Metal gate structure of a CMOS semiconductor device
05/22/2012US8183643 Semiconductor device having silicide layer completely occupied amorphous layer formed in the substrate and an interface junction of (111) silicon plane
05/22/2012US8183642 Gate effective-workfunction modification for CMOS
05/22/2012US8183639 Dual port static random access memory cell layout
05/22/2012US8183636 Static randon access memory cell
05/22/2012US8183635 Semiconductor device
05/22/2012US8183625 NROM flash memory devices on ultrathin silicon
05/22/2012US8183619 Method and system for providing contact to a first polysilicon layer in a flash memory device
05/22/2012US8183607 Semiconductor device
05/22/2012US8183605 Reducing transistor junction capacitance by recessing drain and source regions
05/22/2012US8183596 High electron mobility transistor, epitaxial wafer, and method of fabricating high electron mobility transistor
05/22/2012US8183595 Normally off III-nitride semiconductor device having a programmable gate
05/22/2012US8183592 Light emitting device having a pluralilty of light emitting cells and package mounting the same
05/22/2012US8183584 High efficient phosphor-converted light emitting diode
05/22/2012US8183572 Compound semiconductor device and its manufacture method
05/22/2012US8183569 Semiconductor device
05/22/2012US8183568 Substrate for semiconductor device, semiconductor device, and electronic apparatus
05/22/2012US8183567 Array substrate for liquid crystal display device and method of fabricating the same
05/22/2012US8183556 Extreme high mobility CMOS logic
05/22/2012US8183549 Substrate holding apparatus, and inspection or processing apparatus
05/22/2012US8183467 Wiring board and method of producing the same
05/22/2012US8183165 Plasma processing method
05/22/2012US8183164 Method for preferential growth of semiconducting vertically aligned single walled carbon nanotubes
05/22/2012US8183163 Si3N4 etching liquid including: water; a first liquid ( H3PO4, triethylene glycol, sulfolane) that can be mixed with water to produce a mixture liquid having a boiling point of 150 degrees C. or more; a second liquid capable of producing protons (H+) such as, H2SO4, HNO3, HCL and oxalic acid; oxidizer
05/22/2012US8183162 Method of forming a sacrificial layer
05/22/2012US8183161 Method and system for dry etching a hafnium containing material
05/22/2012US8183160 Method for manufacturing a semiconductor device and semiconductor device obtainable with such a method
05/22/2012US8183159 Device component forming method with a trim step prior to sidewall image transfer (SIT) processing
05/22/2012US8183158 Semiconductor processing apparatus and method for using same
05/22/2012US8183157 Method of forming capacitors, and methods of utilizing silicon dioxide-containing masking structures
05/22/2012US8183156 Method of etching a material surface
05/22/2012US8183154 Selective metal deposition over dielectric layers
05/22/2012US8183153 Method for manufacturing semiconductor device
05/22/2012US8183152 Method of fabricating semiconductor device
05/22/2012US8183151 Methods of forming conductive vias through substrates, and structures and assemblies resulting therefrom
05/22/2012US8183150 Semiconductor device having silicon carbide and conductive pathway interface
05/22/2012US8183149 Method of fabricating a conductive interconnect arrangement for a semiconductor device
05/22/2012US8183148 Method of fabricating semiconductor device and semiconductor device
05/22/2012US8183147 Method of fabricating a conductive post on an electrode
05/22/2012US8183146 Manufacturing method for a buried circuit structure
05/22/2012US8183145 Structure and methods of forming contact structures
05/22/2012US8183144 Method of manufacturing semiconductor device
05/22/2012US8183143 Formation of solder bumps
05/22/2012US8183142 Semiconductor device and a method of manufacturing the same
05/22/2012US8183141 Methods of forming semiconductor devices
05/22/2012US8183140 Semiconductor device and method of fabricating the same
05/22/2012US8183139 Reduced defectivity in contacts of a semiconductor device comprising replacement gate electrode structures by using an intermediate cap layer
05/22/2012US8183138 Methods for forming nanodots and/or a patterned material during the formation of a semiconductor device
05/22/2012US8183137 Use of dopants to provide low defect gate full silicidation
05/22/2012US8183136 Method of forming insulating layer and method of manufacturing transistor using the same
05/22/2012US8183135 Method for manufacturing thin film transistor having hydrogen feeding layer formed between a metal gate and a gate insulating film
05/22/2012US8183134 Semiconductor device and manufacturing method with improved epitaxial quality of III-V compound on silicon surfaces
05/22/2012US8183133 Method for producing semiconductor substrate
05/22/2012US8183132 Methods for fabricating group III nitride structures with a cluster tool
05/22/2012US8183131 Method of cutting an object to be processed
05/22/2012US8183130 Semiconductor device and method of forming shielding layer around back surface and sides of semiconductor wafer containing IPD structure
05/22/2012US8183129 Alignment marks for polarized light lithography and method for use thereof
05/22/2012US8183128 Method of reducing roughness of a thick insulating layer
05/22/2012US8183127 Method for bonding wafers to produce stacked integrated circuits
05/22/2012US8183126 Patterning embedded control lines for vertically stacked semiconductor elements
05/22/2012US8183125 Semiconductor device and manufacturing method
05/22/2012US8183124 Silicon carbide and related wide-bandgap transistors on semi insulating epitaxy
05/22/2012US8183123 Method of forming mark in IC-fabricating process
05/22/2012US8183122 Semiconductor device including semiconductor thin film, which is subjected to heat treatment to have alignment mark, crystallizing method for the semiconductor thin film, and crystallizing apparatus for the semiconductor thin film
05/22/2012US8183121 Carbon-based films, and methods of forming the same, having dielectric filler material and exhibiting reduced thermal resistance
05/22/2012US8183120 Method of making bipolar FinFET technology
05/22/2012US8183119 Semiconductor device fabrication method using multiple mask patterns
05/22/2012US8183118 Method for fabricating MOS transistor
05/22/2012US8183117 Device layout in integrated circuits to reduce stress from embedded silicon-germanium
05/22/2012US8183116 Method of manufacturing a double gate transistor
05/22/2012US8183115 Method of manufacturing a semiconductor device having elevated layers of differing thickness
05/22/2012US8183114 Semiconductor device and manufacturing method thereof for reducing the area of the memory cell region
05/22/2012US8183113 Methods of forming recessed gate structures including blocking members, and methods of forming semiconductor devices having the recessed gate structures
05/22/2012US8183112 Method for fabricating semiconductor device with vertical channel
05/22/2012US8183111 Method of fabricating conductive electrodes on the front and backside of a thin film structure
05/22/2012US8183110 Memory cells, methods of forming dielectric materials, and methods of forming memory cells
05/22/2012US8183109 Semiconductor device and method of manufacturing the same
05/22/2012US8183108 Glass flux assisted sintering of chemical solution deposited thin dielectric films
05/22/2012US8183107 Semiconductor devices with improved local matching and end resistance of RX based resistors
05/22/2012US8183106 Apparatus and associated method for making a floating gate memory device with buried diffusion dielectric structures and increased gate coupling ratio
05/22/2012US8183105 Integrated circuit device with stress reduction layer
05/22/2012US8183104 Method for dual-channel nanowire FET device
05/22/2012US8183103 Integrated circuit structure including schottky diode and method for manufacturing the same
05/22/2012US8183100 Transistor with embedded SI/GE material having enhanced across-substrate uniformity
05/22/2012US8183099 Method for manufacturing transistor
05/22/2012US8183098 SOI device with contact trenches formed during epitaxial growing
05/22/2012US8183096 Static RAM cell design and multi-contact regime for connecting double channel transistors
05/22/2012US8183095 Semiconductor device and method of forming sacrificial protective layer to protect semiconductor die edge during singulation
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