| Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368) |
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| 02/05/2009 | US20090034333 Method for Managing a Non-Volatile Memory In a Smart Card |
| 02/05/2009 | US20090034332 Semiconductor memory device |
| 02/05/2009 | US20090034315 Memory core and semiconductor memory device having the same |
| 02/04/2009 | CN100458973C High speed streamline long-time-delay multi-port SRAM quick access method |
| 02/04/2009 | CN100458972C Synchronous multiple ports memory device |
| 02/03/2009 | US7486588 Method and apparatus for driver circuit to provide a desired voltage level to a device |
| 02/03/2009 | US7486587 Dual data-dependent busses for coupling read/write circuits to a memory array |
| 02/03/2009 | US7486113 Decoder circuit |
| 02/03/2009 | US7485976 Tamper resistant packaging and approach |
| 01/29/2009 | WO2009012582A1 Signal generator and method |
| 01/29/2009 | US20090027993 Semiconductor memory device and data storage method |
| 01/29/2009 | US20090027992 Psram and method for operating thereof |
| 01/29/2009 | US20090027988 Memory device, memory controller and memory system |
| 01/29/2009 | US20090027974 Memory control method and memory control circuit |
| 01/29/2009 | US20090027973 Non-volatile semiconductor storage device |
| 01/29/2009 | US20090027965 Row selector circuit for electrically programmable and erasable non volatile memories |
| 01/29/2009 | US20090027962 Multiple level cell memory device with single bit per cell, re-mappable memory block |
| 01/29/2009 | US20090027956 Resistance variable memory device reducing word line voltage |
| 01/29/2009 | CA2694468A1 Signal generator and method |
| 01/28/2009 | CN101356586A Pseudo-dual port memory where ratio of first to second memory access is clock duty cycle independent |
| 01/28/2009 | CN100456386C Semiconductor storage |
| 01/27/2009 | US7484064 Method and apparatus for signaling between devices of a memory system |
| 01/27/2009 | US7483334 Interleaved input signal path for multiplexed input |
| 01/27/2009 | US7483333 Memory device and method having banks of different sizes |
| 01/27/2009 | US7483332 SRAM cell using separate read and write circuitry |
| 01/27/2009 | US7483331 Semiconductor memory, memory system, and operation method of memory system |
| 01/27/2009 | US7483291 Magneto-resistance effect element, magnetic memory and magnetic head |
| 01/27/2009 | US7483033 Storage device |
| 01/22/2009 | WO2009012209A1 Analog sensing of memory cells in a solid-state memory device |
| 01/22/2009 | WO2009009865A1 Memory with data control |
| 01/22/2009 | US20090024821 Device for storing data and method for dividing space for data storing |
| 01/22/2009 | US20090022006 Integrated logic circuit and method for producing an integrated logic circuit |
| 01/22/2009 | US20090022005 Apparatus and method of controlling bank of semiconductor memory |
| 01/22/2009 | US20090022001 Semiconductor memory device |
| 01/22/2009 | US20090021999 Semiconductor device |
| 01/22/2009 | US20090021993 Semiconductor memory device |
| 01/22/2009 | US20090021990 Memory with level shifting word line driver and method thereof |
| 01/22/2009 | US20090021981 Nonvolatile memory device including circuit formed of thin film transistors |
| 01/22/2009 | US20090021980 Non-volatile memory and operating method thereof |
| 01/22/2009 | US20090021973 Semiconductor memory device |
| 01/22/2009 | DE10133595B4 Pufferschaltung, Speicherzugriffsverfahren und Reed-Solomon-Decoder Buffer circuit, memory access method and Reed-Solomon decoder |
| 01/22/2009 | CA2693929A1 Memory with data control |
| 01/21/2009 | EP2016588A1 Dynamic random access memory with fully independent partial array refresh function |
| 01/21/2009 | EP1701358B1 Data write-in method for flash memory |
| 01/21/2009 | CN101351846A Crossbar-array designs and wire addressing methods that tolerate misalignment of electrical components at wire overlap points |
| 01/21/2009 | CN101350220A Charge recycling operation method and driving circuit and low power memory thereof |
| 01/21/2009 | CN100454434C Multi-port memory cells |
| 01/20/2009 | US7480785 Parallel processing device and parallel processing method |
| 01/20/2009 | US7480754 Assignment of queue execution modes using tag values |
| 01/20/2009 | US7480338 Constellation mapping apparatus and method |
| 01/20/2009 | US7480203 Method and apparatus for initialization of read latency tracking circuit in high-speed DRAM |
| 01/20/2009 | US7480202 High speed array pipeline architecture |
| 01/20/2009 | US7480201 Daisy chainable memory chip |
| 01/20/2009 | US7480200 Semiconductor memory device suitable for mounting on portable terminal |
| 01/20/2009 | US7480194 Data input/output (I/O) apparatus for use in a memory device |
| 01/20/2009 | US7479814 Circuit for digital frequency synthesis in an integrated circuit |
| 01/15/2009 | WO2008094968A3 Clock circuitry for ddr-sdram memory controller |
| 01/15/2009 | US20090016146 Latency counter, semiconductor memory device including the same, and data processing system |
| 01/15/2009 | US20090016144 Semiconductor memory device |
| 01/15/2009 | US20090016143 Word line activation in memory devices |
| 01/15/2009 | US20090016134 Semiconductor memory device |
| 01/15/2009 | US20090016133 Semiconductor memory and system |
| 01/15/2009 | US20090016127 Duty detection circuit, dll circuit using the same, semiconductor memory circuit, and data processing system |
| 01/15/2009 | US20090016126 Semiconductor memory device |
| 01/15/2009 | US20090016125 Semiconductor memory device |
| 01/15/2009 | US20090016121 Semiconductor memory device and test method thereof |
| 01/15/2009 | US20090016120 Synchronous semiconductor device and data processing system including the same |
| 01/15/2009 | US20090016106 Sub volt flash memory system |
| 01/14/2009 | CN100452241C Delay locked loop in semiconductor memory device and its clock locking method |
| 01/14/2009 | CN100452240C Multi-port memory device having serial i/o interface |
| 01/14/2009 | CN100452236C Semiconductor memory |
| 01/14/2009 | CN100451744C Semiconductor circuit |
| 01/13/2009 | US7477570 Sequential access memory with system and method |
| 01/13/2009 | US7477569 Semiconductor memory device capable of performing page mode operation |
| 01/13/2009 | US7477568 Using common mode differential data signals of DDR2 SDRAM for control signal transmission |
| 01/13/2009 | US7477567 Memory storage device with heating element |
| 01/13/2009 | US7477566 Multi-port semiconductor memory |
| 01/13/2009 | US7477225 Semiconductor integrated circuit device and shift register for device driver |
| 01/08/2009 | WO2009006442A1 Block addressing for parallel memory arrays |
| 01/08/2009 | WO2008016948A3 Dual data-dependent busses for coupling read/write circuits to a memory array |
| 01/08/2009 | US20090010092 Address counter, semiconductor memory device having the same, and data processing system |
| 01/08/2009 | US20090010091 Address counter, semiconductor memory device having the same, and data processing system |
| 01/08/2009 | US20090010090 Bucket brigade address decoding architecture for classical and quantum random access memories |
| 01/08/2009 | US20090010083 Clock circuitry for ddr-sdram memory controller |
| 01/08/2009 | US20090010080 Semiconductor memory device, and method of controlling the same |
| 01/08/2009 | US20090010073 Non-Volatile Memory System Including Spare Array and Method of Erasing a Block in the Same |
| 01/08/2009 | US20090010062 Bit line decoder architecture for NOR-type memory array |
| 01/08/2009 | US20090010061 Bit line decoder architecture for NOR-type memory array |
| 01/08/2009 | US20090010060 Bit line decoder architecture for nor-type memory array |
| 01/08/2009 | US20090010057 Semiconductor memory device with memory cell having charge accumulation layer and control gate and memory system |
| 01/08/2009 | US20090010055 One-transistor type DRAM |
| 01/08/2009 | US20090010044 Toggle Magnetic Random Access Memory and Write Method of Toggle Magnetic Random Access Memory |
| 01/08/2009 | DE102007031411A1 Integrierte Schaltung und Verfahren zum Umladen eines Schaltungsteils der integrierten Schaltung Integrated circuit and method for transferring a circuit part of the integrated circuit |
| 01/07/2009 | EP2011146A1 Dynamic memory cell structures |
| 01/07/2009 | EP1639602B1 Low power manager for standby operation of a memory system |
| 01/07/2009 | CN100449814C Magneto-resistance effect element, magnetic memory and magnetic head |
| 01/07/2009 | CN100449788C Magnetoresistive random acess memory device structures and methods for fabricating the same |
| 01/06/2009 | US7475273 Hybrid parallel/serial bus interface |
| 01/06/2009 | US7474588 Data output circuits for an integrated circuit memory device in which data is output responsive to selective invocation of a plurality of clock signals, and methods of operating the same |
| 01/06/2009 | US7474587 Flash memory device with rapid random access function and computing system including the same |